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Date: Sat, 11 May 2024 10:35:13 +0100
From: "Russell King (Oracle)" <linux@armlinux.org.uk>
To: Andrew Lunn <andrew@lunn.ch>
Cc: Daniel Golle <daniel@makrotopia.org>,
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	netdev@vger.kernel.org
Subject: Re: [net-next PATCH v10 3/5] net: phy: add support for PHY LEDs
 polarity modes
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Sender: Russell King (Oracle) <linux@armlinux.org.uk>

On Sat, May 11, 2024 at 01:58:13AM +0200, Andrew Lunn wrote:
> > Wanting to make use of this I noticed that polarity settings are only
> > applied once in of_phy_led(), which is not sufficient for my use-case:
> > 
> > I'm writing a LED driver for Aquantia PHYs and those PHYs reset the
> > polarity mode every time a PHY reset is triggered.

What sort of reset? There are hard resets that set the registers back
to default, and soft resets that don't. I think you are referring to
a hard reset, but please be clear.

> > I ended up writing the patch below, but I'm not sure if phy_init_hw
> > should take care of this or if the polarity modes should be stored in
> > memory allocated by the PHY driver and re-applied by the driver after
> > reset (eg. in .config_init). Kinda depends on taste and on how common
> > this behavior is in practise, so I thought the best is to reach out to
> > discuss.
> 
> There was a similar discussion recently about WoL settings getting
> lost. The conclusion about that was the PHY should keep track of WoL
> setting. So i would say the same applies there. Please store it in a
> local priv structure.

Agreed. If it turns out that it's something that many PHYs need to do,
that would be the tiem to move it into the core phylib code. If it only
affects a minority of drivers, then it's something drivers should do.

The reasoning here is: if its only a problem for a small amount of PHY
drivers, then we don't need to penalise everyone with additional
overhead. If it's the majority of drivers, then it makes sense to
remove this burden from drivers.

Also note that this is one of the reasons I don't particularly like
the kernel's approach to PHY hardware resets - if a platform firmware
decides to describe the PHy hardware reset to the kernel, then we end
up with the hardware reset being used at various points which will
clear all the registers back to the reset defaults including clearing
WoL settings and the like. That's fine for AN state which will get
reloaded, but other state does not, so describing the hardware reset
can make things much more complicated and introduce differing
behaviours compared to platforms that don't describe it.

A lot of platforms choose not to describe the PHY hardware reset, but
some people see that there's a way to describe it, so they do whether
or not there's a reason for the kernel to be manipulating that reset
signal.

What I'm saying is there's several issues here that all interact...

-- 
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