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charset=us-ascii Content-Disposition: inline In-Reply-To: <26d4ad30-c0fe-4286-9802-aa6afbd8074a@gmail.com> X-Scanned-By: MIMEDefang 3.4.1 on 10.11.54.10 On Mon, May 13, 2024 at 09:33:27AM +0200, Benjamin Meier wrote: > > From: Christoph Hellwig > > > > So let them argue why. I'd rather have a really, really, really > > good argument for this crap, and I'd like to hear it from the horses > > mouth. > > I reached out to Keith to explore the possibility of manually defining > which cores handle NVMe interrupts. > > The application which we develop and maintain (in the company I work) > has very high requirements regarding latency. We have some isolated cores Are these isolated cores controlled by kernel command line `isolcpus=`? > and we run our application on those. > > Our system is using kernel 5.4 which unfortunately does not support > "isolcpus=managed_irq". Actually, we did not even know about that > option, because we are focussed on kernel 5.4. It solves part > of our problem, but being able to specify where exactly interrupts > are running is still superior in our opinion. > > E.g. assume the number of house-keeping cores is small, because we > want to have full control over the system. In our case we have threads > of different priorities where some get an exclusive core. Some other threads > share a core (or a group of cores) with other threads. Now we are still > happy to assign some interrupts to some of the cores which we consider as > "medium-priority". Due to the small number of non-isolated cores, it can So these "medium-priority" cores belong to isolated cpu list, you still expect NVMe interrupts can be handled on these cpu cores, do I understand correctly? If yes, I think your case still can be covered with 'isolcpus=managed_irq' which needn't to be same with cpu cores specified from `isolcpus=`, such as excluding medium-priority cores from 'isolcpus=managed_irq', and meantime include them in plain `isolcpus=`. > be tricky to assign all interrupts to those without a performance-penalty. > > Given these requirements, manually specifying interrupt/core assignments > would offer greater flexibility and control over system performance. > Moreover, the proposed code changes appear minimal and have no > impact on existing functionalities. Looks your main concern is performance, but as Keith mentioned, the proposed change may degrade nvme perf too: https://lore.kernel.org/linux-nvme/Zj6745UDnwX1BteO@kbusch-mbp.dhcp.thefacebook.com/ thanks, Ming