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Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Lee Jones , Arnd Bergmann , Horatiu Vultur , UNGLinuxDriver@microchip.com, Andrew Lunn , Heiner Kallweit , Russell King , Saravana Kannan , Bjorn Helgaas , Philipp Zabel , Lars Povlsen , Steen Hegelund , Daniel Machon , Alexandre Belloni , linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, netdev@vger.kernel.org, linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Allan Nielsen , Luca Ceresoli , Thomas Petazzoni Subject: Re: [PATCH 09/17] dt-bindings: interrupt-controller: Add support for Microchip LAN966x OIC Message-ID: <20240513190457.43318788@bootlin.com> In-Reply-To: <20240513145358.GA2574205-robh@kernel.org> References: <20240430083730.134918-1-herve.codina@bootlin.com> <20240430083730.134918-10-herve.codina@bootlin.com> <20240507152806.GA505222-robh@kernel.org> <20240513143720.1174306a@bootlin.com> <20240513145358.GA2574205-robh@kernel.org> Organization: Bootlin X-Mailer: Claws Mail 4.2.0 (GTK 3.24.41; x86_64-redhat-linux-gnu) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-GND-Sasl: herve.codina@bootlin.com Hi Rob, On Mon, 13 May 2024 09:53:58 -0500 Rob Herring wrote: > On Mon, May 13, 2024 at 02:37:20PM +0200, Herve Codina wrote: > > Hi Rob, > > > > On Tue, 7 May 2024 10:28:06 -0500 > > Rob Herring wrote: > > > > ... > > > > +examples: > > > > + - | > > > > + interrupt-controller@e00c0120 { > > > > + compatible = "microchip,lan966x-oic"; > > > > + reg = <0xe00c0120 0x190>; > > > > > > Looks like this is part of some larger block? > > > > > > > According to the registers information document: > > https://microchip-ung.github.io/lan9662_reginfo/reginfo_LAN9662.html?select=cpu,intr > > > > The interrupt controller is mapped at offset 0x48 (offset in number of > > 32bit words). > > -> Address offset: 0x48 * 4 = 0x120 > > -> size: (0x63 + 1) * 4 = 0x190 > > > > IMHO, the reg property value looks correct. > > What I mean is h/w blocks don't just start at some address with small > alignment. That wouldn't work from a physical design standpoint. The > larger block here is "CPU System Regs". The block as a whole should be > documented, but maybe that ship already sailed. The clock controller, also part of the "CPU System Regs" is already defined and used without the larger block Documentation/devicetree/bindings/clock/microchip,lan966x-gck.yaml IMHO, the binding related to the interrupt controller should be consistent with the one related to the clock controller. > > Also, here you call it the OIC, but the link above calls it the VCore > interrupt controller. Yes, I call it OIC (Outband Interrupt Controller) as it is its name in the datasheet explaining how it works. The datasheet I have is not publicly available and so, I can point only to the register map (url provided). I think it would be better to keep "Outband Interrupt Controller" as mentioned in the datasheet. Best regards, Hervé -- Hervé Codina, Bootlin Embedded Linux and Kernel engineering https://bootlin.com