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Date: Mon, 13 May 2024 16:18:17 -0700
From: Jakub Kicinski <kuba@kernel.org>
To: Hariprasad Kelam <hkelam@marvell.com>
Cc: <netdev@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
 <davem@davemloft.net>, <sgoutham@marvell.com>, <gakula@marvell.com>,
 <jerinj@marvell.com>, <lcherian@marvell.com>, <sbhatta@marvell.com>,
 <naveenm@marvell.com>, <edumazet@google.com>, <pabeni@redhat.com>
Subject: Re: [PATCH] octeontx2-pf: devlink params support to set TL1 round
 robin priority
Message-ID: <20240513161817.048123bf@kernel.org>
In-Reply-To: <20240513053546.4067-1-hkelam@marvell.com>
References: <20240513053546.4067-1-hkelam@marvell.com>
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On Mon, 13 May 2024 11:05:46 +0530 Hariprasad Kelam wrote:
> Added support for setting or modifying transmit level (tl1) round robin
> priority at runtime via devlink params.
> 
> Octeontx2 and CN10K silicon's support five transmit levels (TL5 to TL1).
> On each transmit level Hardware supports DWRR and strict priority,
> depend on the configuration the hardware will choose the appropriate method
> to select packets for the next level in the transmission process.

Configuring DWRR parameters seems in no way HW specific.
Please work on extending one of the Tx scheduling APIs to express this.
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