Received-SPF: pass (google.com: domain of linux-kernel+bounces-179053-linux.lists.archive=gmail.com@vger.kernel.org designates 2604:1380:45d1:ec00::1 as permitted sender) client-ip=2604:1380:45d1:ec00::1;
Precedence: bulk
MIME-Version: 1.0
References: <cover.1714752293.git.tjeznach@rivosinc.com> <b28d4fe49c5fe4e3ece9de789cfd92cfa5b3c16c.1714752293.git.tjeznach@rivosinc.com>
 <CANXhq0q+aQ1T37j4uQi5ryUyPxBtvQkaBJ9qvS9iGwSRGaQSyQ@mail.gmail.com>
In-Reply-To: <CANXhq0q+aQ1T37j4uQi5ryUyPxBtvQkaBJ9qvS9iGwSRGaQSyQ@mail.gmail.com>
From: Tomasz Jeznach <tjeznach@rivosinc.com>
Date: Tue, 14 May 2024 11:19:25 -0700
Message-ID: <CAH2o1u5fMtKYLAzYwdKXgp2YDE7jH=b4Rm1VXFGOzojt0eUzQg@mail.gmail.com>
Subject: Re: [PATCH v4 4/7] iommu/riscv: Enable IOMMU registration and device probe.
To: Zong Li <zong.li@sifive.com>
Cc: Joerg Roedel <joro@8bytes.org>, Will Deacon <will@kernel.org>, 
	Robin Murphy <robin.murphy@arm.com>, Paul Walmsley <paul.walmsley@sifive.com>, 
	Anup Patel <apatel@ventanamicro.com>, devicetree@vger.kernel.org, 
	Conor Dooley <conor+dt@kernel.org>, Albert Ou <aou@eecs.berkeley.edu>, linux@rivosinc.com, 
	linux-kernel@vger.kernel.org, Rob Herring <robh+dt@kernel.org>, 
	Sebastien Boeuf <seb@rivosinc.com>, iommu@lists.linux.dev, 
	Palmer Dabbelt <palmer@dabbelt.com>, Nick Kossifidis <mick@ics.forth.gr>, 
	Krzysztof Kozlowski <krzk+dt@kernel.org>, linux-riscv@lists.infradead.org, 
	Lu Baolu <baolu.lu@linux.intel.com>
Content-Type: text/plain; charset="UTF-8"
Content-Transfer-Encoding: quoted-printable

On Mon, May 13, 2024 at 10:56=E2=80=AFPM Zong Li <zong.li@sifive.com> wrote=
:
>
> On Sat, May 4, 2024 at 12:13=E2=80=AFAM Tomasz Jeznach <tjeznach@rivosinc=
com> wrote:
> >
> > Advertise IOMMU device and its core API.
> > Only minimal implementation for single identity domain type, without
> > per-group domain protection.
> >
> > Reviewed-by: Lu Baolu <baolu.lu@linux.intel.com>
> > Signed-off-by: Tomasz Jeznach <tjeznach@rivosinc.com>
> > ---
> >  drivers/iommu/riscv/iommu.c | 66 +++++++++++++++++++++++++++++++++++++
> >  1 file changed, 66 insertions(+)
> >
> > diff --git a/drivers/iommu/riscv/iommu.c b/drivers/iommu/riscv/iommu.c
> > index 3c5a6b49669d..1f889daffb0e 100644
> > --- a/drivers/iommu/riscv/iommu.c
> > +++ b/drivers/iommu/riscv/iommu.c
> > @@ -17,6 +17,7 @@
> >  #include <linux/init.h>
> >  #include <linux/iommu.h>
> >  #include <linux/kernel.h>
> > +#include <linux/pci.h>
> >
> >  #include "iommu-bits.h"
> >  #include "iommu.h"
> > @@ -36,6 +37,60 @@ static void riscv_iommu_disable(struct riscv_iommu_d=
evice *iommu)
> >         riscv_iommu_writel(iommu, RISCV_IOMMU_REG_PQCSR, 0);
> >  }
> >
> > +static int riscv_iommu_attach_identity_domain(struct iommu_domain *iom=
mu_domain,
> > +                                             struct device *dev)
> > +{
> > +       /* Global pass-through already enabled, do nothing for now. */
> > +       return 0;
> > +}
> > +
> > +static struct iommu_domain riscv_iommu_identity_domain =3D {
> > +       .type =3D IOMMU_DOMAIN_IDENTITY,
> > +       .ops =3D &(const struct iommu_domain_ops) {
> > +               .attach_dev =3D riscv_iommu_attach_identity_domain,
> > +       }
> > +};
> > +
> > +static int riscv_iommu_device_domain_type(struct device *dev)
> > +{
> > +       return IOMMU_DOMAIN_IDENTITY;
> > +}
> > +
> > +static struct iommu_group *riscv_iommu_device_group(struct device *dev=
)
> > +{
> > +       if (dev_is_pci(dev))
> > +               return pci_device_group(dev);
> > +       return generic_device_group(dev);
> > +}
> > +
> > +static int riscv_iommu_of_xlate(struct device *dev, const struct of_ph=
andle_args *args)
> > +{
> > +       return iommu_fwspec_add_ids(dev, args->args, 1);
> > +}
> > +
> > +static struct iommu_device *riscv_iommu_probe_device(struct device *de=
v)
> > +{
> > +       struct iommu_fwspec *fwspec =3D dev_iommu_fwspec_get(dev);
> > +       struct riscv_iommu_device *iommu;
> > +
> > +       if (!fwspec->iommu_fwnode->dev || !fwspec->num_ids)
> > +               return ERR_PTR(-ENODEV);
>
> It seems to me that we might need to ensure fwspec is not NULL before
> accessing fwspec->iommu_fwnode, otherwise, it will cause NULL pointer
> dereference.
>

Thank you. Fix applied to v5.

> > +
> > +       iommu =3D dev_get_drvdata(fwspec->iommu_fwnode->dev);
> > +       if (!iommu)
> > +               return ERR_PTR(-ENODEV);
> > +
> > +       return &iommu->iommu;
> > +}
> > +
> > +static const struct iommu_ops riscv_iommu_ops =3D {
> > +       .of_xlate =3D riscv_iommu_of_xlate,
> > +       .identity_domain =3D &riscv_iommu_identity_domain,
> > +       .def_domain_type =3D riscv_iommu_device_domain_type,
> > +       .device_group =3D riscv_iommu_device_group,
> > +       .probe_device =3D riscv_iommu_probe_device,
> > +};
> > +
> >  static int riscv_iommu_init_check(struct riscv_iommu_device *iommu)
> >  {
> >         u64 ddtp;
> > @@ -71,6 +126,7 @@ static int riscv_iommu_init_check(struct riscv_iommu=
_device *iommu)
> >
> >  void riscv_iommu_remove(struct riscv_iommu_device *iommu)
> >  {
> > +       iommu_device_unregister(&iommu->iommu);
> >         iommu_device_sysfs_remove(&iommu->iommu);
> >  }
> >
> > @@ -95,5 +151,15 @@ int riscv_iommu_init(struct riscv_iommu_device *iom=
mu)
> >                 return dev_err_probe(iommu->dev, rc,
> >                                      "cannot register sysfs interface\n=
");
> >
> > +       rc =3D iommu_device_register(&iommu->iommu, &riscv_iommu_ops, i=
ommu->dev);
> > +       if (rc) {
> > +               dev_err_probe(iommu->dev, rc, "cannot register iommu in=
terface\n");
> > +               goto err_remove_sysfs;
> > +       }
> > +
> >         return 0;
> > +
> > +err_remove_sysfs:
> > +       iommu_device_sysfs_remove(&iommu->iommu);
> > +       return rc;
> >  }
> > --
> > 2.34.1
> >
> >

Best,
- Tomasz

> > _______________________________________________
> > linux-riscv mailing list
> > linux-riscv@lists.infradead.org
> > http://lists.infradead.org/mailman/listinfo/linux-riscv