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Tue, 14 May 2024 19:54:41 +0000 Received: from smtpav03.dal12v.mail.ibm.com (smtpav03.dal12v.mail.ibm.com [10.241.53.102]) by smtprelay07.dal12v.mail.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id 44EJsdE340763676 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Tue, 14 May 2024 19:54:41 GMT Received: from smtpav03.dal12v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 75E8B5806E; Tue, 14 May 2024 19:54:37 +0000 (GMT) Received: from smtpav03.dal12v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 40B6858070; Tue, 14 May 2024 19:54:37 +0000 (GMT) Received: from slate16.aus.stglabs.ibm.com (unknown [9.61.107.19]) by smtpav03.dal12v.mail.ibm.com (Postfix) with ESMTP; Tue, 14 May 2024 19:54:37 +0000 (GMT) From: Eddie James To: linux-fsi@lists.ozlabs.org Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, eajames@linux.ibm.com, krzk+dt@kernel.org, conor+dt@kernel.org, robh@kernel.org, joel@jms.id.au, andrew@codeconstruct.com.au Subject: [PATCH v5 5/9] dt-bindings: fsi: Document the FSI controller common properties Date: Tue, 14 May 2024 14:54:31 -0500 Message-Id: <20240514195435.155372-6-eajames@linux.ibm.com> X-Mailer: git-send-email 2.39.3 In-Reply-To: <20240514195435.155372-1-eajames@linux.ibm.com> References: <20240514195435.155372-1-eajames@linux.ibm.com> X-TM-AS-GCONF: 00 X-Proofpoint-ORIG-GUID: kk-dG1gi_4c2m81zcq06tZ2kBuWv98gI X-Proofpoint-GUID: kk-dG1gi_4c2m81zcq06tZ2kBuWv98gI Content-Transfer-Encoding: 8bit X-Proofpoint-UnRewURL: 0 URL was un-rewritten Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.650,FMLib:17.11.176.26 definitions=2024-05-14_12,2024-05-14_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 lowpriorityscore=0 mlxlogscore=999 malwarescore=0 impostorscore=0 bulkscore=0 adultscore=0 phishscore=0 clxscore=1015 priorityscore=1501 suspectscore=0 mlxscore=0 spamscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2405010000 definitions=main-2405140142 Since there are multiple FSI controllers documented, the common properties should be documented separately and then referenced from the specific controller documentation. Signed-off-by: Eddie James --- Changes since v4: - Add interrupt controller properties - Add clock-frequency property to FSI controller and CFAM - Add detail to chip-id property description .../bindings/fsi/fsi-controller.yaml | 66 +++++++++++++++++++ 1 file changed, 66 insertions(+) create mode 100644 Documentation/devicetree/bindings/fsi/fsi-controller.yaml diff --git a/Documentation/devicetree/bindings/fsi/fsi-controller.yaml b/Documentation/devicetree/bindings/fsi/fsi-controller.yaml new file mode 100644 index 0000000000000..8620e4da6de77 --- /dev/null +++ b/Documentation/devicetree/bindings/fsi/fsi-controller.yaml @@ -0,0 +1,66 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/fsi/fsi-controller.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: FSI Controller Common Properties + +maintainers: + - Eddie James + +description: + FSI (FRU (Field Replaceable Unit) Service Interface) is a two wire bus. The + FSI bus is connected to a CFAM (Common FRU Access Macro) which contains + various engines such as I2C controllers, SPI controllers, etc. + +properties: + "#address-cells": + const: 2 + + "#size-cells": + const: 0 + + '#interrupt-cells': + const: 1 + + clock-frequency: + minimum: 1 + maximum: 200000000 + + interrupt-controller: true + + no-scan-on-init: + $ref: /schemas/types.yaml#/definitions/flag + description: + The FSI controller cannot scan the bus during initialization. + +patternProperties: + "cfam@[0-9a-f],[0-9a-f]": + type: object + properties: + chip-id: + $ref: /schemas/types.yaml#/definitions/uint32 + description: + Processor index, a global unique chip ID which is used to identify + the physical location of the chip in a system specific way. + + clock-frequency: + minimum: 1 + maximum: 100000000 + + reg: + maxItems: 1 + + "#address-cells": + const: 1 + + "#size-cells": + const: 1 + + required: + - reg + + additionalProperties: true + +additionalProperties: true -- 2.39.3