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Date: Tue, 14 May 2024 22:38:19 +0100 (BST)
From: "Maciej W. Rozycki" <macro@orcam.me.uk>
To: Jiaxun Yang <jiaxun.yang@flygoat.com>
cc: Thomas Bogendoerfer <tsbogend@alpha.franken.de>, 
    Nathan Chancellor <nathan@kernel.org>, 
    Nick Desaulniers <ndesaulniers@google.com>, 
    Bill Wendling <morbo@google.com>, Justin Stitt <justinstitt@google.com>, 
    linux-mips@vger.kernel.org, linux-kernel@vger.kernel.org, 
    llvm@lists.linux.dev, Guenter Roeck <linux@roeck-us.net>
Subject: Re: [PATCH 6/8] MIPS: Limit MIPS_MT_SMP support by ISA reversion
In-Reply-To: <20240202-llvm-msym32-v1-6-52f0631057d6@flygoat.com>
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References: <20240202-llvm-msym32-v1-0-52f0631057d6@flygoat.com> <20240202-llvm-msym32-v1-6-52f0631057d6@flygoat.com>
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On Fri, 2 Feb 2024, Jiaxun Yang wrote:

> MIPS MT ASE is only available on ISA between Release 1 and Release 5.

 R2+ only actually, as also evident from Kconfig...

> --- a/arch/mips/Kconfig
> +++ b/arch/mips/Kconfig
> @@ -2171,7 +2171,8 @@ config CPU_R4K_CACHE_TLB
>  config MIPS_MT_SMP
>  	bool "MIPS MT SMP support (1 TC on each available VPE)"
>  	default y
> -	depends on SYS_SUPPORTS_MULTITHREADING && !CPU_MIPSR6 && !CPU_MICROMIPS
> +	depends on TARGET_ISA_REV > 0 && TARGET_ISA_REV < 6
> +	depends on SYS_SUPPORTS_MULTITHREADING && !CPU_MICROMIPS
>  	select CPU_MIPSR2_IRQ_VI
>  	select CPU_MIPSR2_IRQ_EI
                   ^^^^^^
 ... here.  I wish people looked beyond the line they change, sigh...

  Maciej