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From: "Wang, Xiao W" <xiao.w.wang@intel.com>
To: Conor Dooley <conor.dooley@microchip.com>, Andrew Jones
	<ajones@ventanamicro.com>
CC: "paul.walmsley@sifive.com" <paul.walmsley@sifive.com>,
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	<pulehui@huawei.com>, "Li, Haicheng" <haicheng.li@intel.com>,
	"conor@kernel.org" <conor@kernel.org>, Ben Dooks <ben.dooks@codethink.co.uk>
Subject: RE: [PATCH v2] riscv, bpf: Optimize zextw insn with Zba extension
Thread-Topic: [PATCH v2] riscv, bpf: Optimize zextw insn with Zba extension
Thread-Index: AQHao0tSYAL6LqZaWUWtv7jZE6ZoR7GVZY4AgADuVMCAAG0hAIABObEAgAAUZQCAAB7G8A==
Date: Wed, 15 May 2024 11:31:43 +0000
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 =?Windows-1252?Q?e+9X+xyLQiueJ11F2j6380CH8qjHbBR4Ji21yuOOJgpDSW7Ui4OEqmhS?=
 =?Windows-1252?Q?M/BQE0FtHtYoJHVCJlSzeSMhIm6HGPX+wsQ6Jqwnxf36Ogdj/67jzt2y?=
 =?Windows-1252?Q?IKAJWd55K2ONAs8jvF9nrbI/iAfYjJe4sDvFKnIG4taLaRMpcpJtZsta?=
 =?Windows-1252?Q?mdI0Qzt24KiO/hviplXlVFROFDg33y2gpkHzFdzrlGOvvLm9yFd0uNmW?=
 =?Windows-1252?Q?yCieOILq0r/0n1kCGdcmL+k356uAtVFSNZwx8v71PGfkMzHO1auu/yLm?=
 =?Windows-1252?Q?o5R4xcIeW7sY2FX88UcyH36o6AaD2kin16UFMhbbipr40mlr618wHQWR?=
 =?Windows-1252?Q?FAco5ZzDtnZTfPIV6Od43pDBb34jyb0boX6A6Yeo4JcNI0rtTJ++qdKh?=
 =?Windows-1252?Q?yCf7sI6h8AZVU0I+JRvW7Zx5PV3bQc48g4oumKUwQfs2tLk9WU1ZOq8T?=
 =?Windows-1252?Q?WFSgqedOaQS01J0q+VRm1zad+LnfEpOZRQhzH5IOELQgzrU2TXFxeKD7?=
 =?Windows-1252?Q?PkHIJFsvOm7E7XuFAEGHr4goaPEmueqYldGWeyNwrxxVBjdLYfutYRoa?=
 =?Windows-1252?Q?FBzZAHVdAvUZ91Qurb9r5wlMJenrZzxX5M5U87Au1F7XCt7Awrg8lG/z?=
 =?Windows-1252?Q?wRvUqL4sTqmnOHuFgt7dvaZTwVNQwqWQ04wuoSCfaLYgMaEYQs3V1tmg?=
 =?Windows-1252?Q?++9RiuSWGu+VPadQR7KNyAP7b36t1zj/yZZAA2VRTWvBWScbUiOE8agy?=
 =?Windows-1252?Q?2jrnJUCs0YvlRQ6nqLg3ayK3kzaLDtN+KSKJPoSyzecjvWiEf+cFHiw9?=
 =?Windows-1252?Q?2gtf1eW7Bqark/4e6FJDzANHa7I4hvQ5oOFYh2/AJpXz/2HW5cSWkhX2?=
 =?Windows-1252?Q?rQmMOvutOnVNo4vFrnYj+73G86AD84M7QYsNgMbryFv8EXT1DP4bONcV?=
 =?Windows-1252?Q?+S97vuHi9tiiYFa8TdGdb24HFl79EdcxZFW/q2KYKPaGRe0wCmMSzd7d?=
 =?Windows-1252?Q?y0KQ1R/yvTq0r88gZzGSzYwLS2W/1v4QOeii0UOGL9YkopWCPxmM9iyy?=
 =?Windows-1252?Q?TT7Np6f52JMUHGg1K/VSACcldwcWmXERTu0FtNOwdtFIBUTGC/1x534v?=
 =?Windows-1252?Q?MtoDNRC92FXk4FCHFhcshiZ8qjbEAsdnrWUaOasfnf9mCkC0MTv+cSFr?=
 =?Windows-1252?Q?V+fGZNooe1/W3HcyDqlkVeqEFYDELw7pdtndEpz5x+vwPMZ+Vpi3mkwa?=
 =?Windows-1252?Q?n2QhEVB6KQJu19NX0x8Usy79rhLLoU0qyYudGkxxRvRyqEzAVHnGeGtx?=
 =?Windows-1252?Q?2/xUT3nbOY98IOuub/fd9Teu0BQho+CPODEbxHH6qWlTZ+FqAhfy8we4?=
 =?Windows-1252?Q?GXMn5Gp+Egkp71t4xSyGcrCWUCgVfZBGKmZE/t2m2gYfOq99fjPbOPxE?=
 =?Windows-1252?Q?eLgojALSGMptQ8P3VlNOfvx+8DJDGQsHnEeL6eUUlqFc8VnbFQwhmd/F?=
 =?Windows-1252?Q?dtG+A/6qx3juVpnup7U7qjyzDenPFppgj5gXYCtOrslbtg/Y5czEQBdB?=
 =?Windows-1252?Q?rrT7I6wzo+3IN8+8wJZMRuEQFVfYJES8HmYXqsxnDF85jPKyWXAGKKUm?=
 =?Windows-1252?Q?ljIaCdZiEkZgHI7nJt8g1QGPTrteiDMS?=
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> -----Original Message-----
> From: Conor Dooley <conor.dooley@microchip.com>
> Sent: Wednesday, May 15, 2024 5:33 PM
> To: Andrew Jones <ajones@ventanamicro.com>
> Cc: Wang, Xiao W <xiao.w.wang@intel.com>; paul.walmsley@sifive.com;
> palmer@dabbelt.com; aou@eecs.berkeley.edu; luke.r.nels@gmail.com;
> xi.wang@gmail.com; bjorn@kernel.org; ast@kernel.org;
> daniel@iogearbox.net; andrii@kernel.org; martin.lau@linux.dev;
> eddyz87@gmail.com; song@kernel.org; yonghong.song@linux.dev;
> john.fastabend@gmail.com; kpsingh@kernel.org; sdf@google.com;
> haoluo@google.com; jolsa@kernel.org; linux-riscv@lists.infradead.org; lin=
ux-
> kernel@vger.kernel.org; bpf@vger.kernel.org; pulehui@huawei.com; Li,
> Haicheng <haicheng.li@intel.com>; conor@kernel.org; Ben Dooks
> <ben.dooks@codethink.co.uk>
> Subject: Re: [PATCH v2] riscv, bpf: Optimize zextw insn with Zba extensio=
n
>=20
> On Wed, May 15, 2024 at 09:19:46AM +0100, Conor Dooley wrote:
> > On Tue, May 14, 2024 at 03:37:02PM +0200, Andrew Jones wrote:
> > > On Tue, May 14, 2024 at 07:36:04AM GMT, Wang, Xiao W wrote:
> > > > > From: Andrew Jones <ajones@ventanamicro.com>
> > >> > > > +config RISCV_ISA_ZBA
> > > > > > +	bool "Zba extension support for bit manipulation instructions=
"
> > > > > > +	depends on TOOLCHAIN_HAS_ZBA
> > > > >
> > > > > We handcraft the instruction, so why do we need toolchain support=
?
> > > >
> > > > Good point, we don't need toolchain support for this bpf jit case.
> > > >
> > > > >
> > > > > > +	depends on RISCV_ALTERNATIVE
> > > > >
> > > > > Also, while riscv_has_extension_likely() will be accelerated with
> > > > > RISCV_ALTERNATIVE, it's not required.
> > > >
> > > > Agree, it's not required. For this bpf jit case, we should drop the=
se two
> dependencies.
> > > >
> > > > BTW, Zbb is used in bpf jit, the usage there also doesn't depend on
> toolchain and
> > > > RISCV_ALTERNATIVE, but the Kconfig for RISCV_ISA_ZBB has forced the
> dependencies
> > > > due to Zbb assembly programming elsewhere.
> > > > Maybe we could just dynamically check the existence of RISCV_ISA_ZB=
*
> before jit code
> > > > emission? or introduce new config options for bpf jit? I prefer the=
 first
> method and
> > > > welcome any comments.
> > >
> > > My preferences is to remove as much of the TOOLCHAIN_HAS_ stuff as
> > > possible. We should audit the extensions which have them to see if
> > > they're really necessary.
> >
> > While I think it is reasonable to allow the "RISCV_ISA_ZBB" option to
> > control whether or not bpf is allowed to use it for optimisations, only
> > allowing bpf to do that if there's toolchain support feels odd to me..
> > Maybe we need to sorta steal from Charlie's patchset and introduce
> > some hidden options that have the toolchain dep that are used by the
> > alternative macros etc?
> >
> > I'll have a poke at how bad that looks I think.
>=20
> I don't love this, in particular my option naming, but it would allow
> the Zbb optimisations in the kernel to not depend on toolchain support
> while not muddying the Kconfig waters for users:
> https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux.git/commit/?h=
=3Dri
> scv-zbb_split

In that patch, I think the bpt jit part should check IS_ENABLED(CONFIG_RISC=
V_ISA_ZBB)
rather than IS_ENABLED(CONFIG_RISCV_ISA_ZBB_ALT).

> A similar model could be followed if there were to be some
> optimisations for Zba in the future that do require toolchain support:

Though this model introduces extra hidden Kconfig option, it does provide f=
iner=20
config granularity. This should be a separate patch in the future, we can d=
iscuss about
the option naming there.

BRs,
Xiao