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Wed, 15 May 2024 22:00:08 +0300 Date: Wed, 15 May 2024 22:00:08 +0300 From: Dmitry Rokosov To: CC: , , , , , , , , , , , , , , , Subject: Re: [PATCH v3 4/7] dt-bindings: clock: meson: a1: peripherals: support sys_pll input Message-ID: <20240515190008.cbv4kj4inkg2bm56@CAB-WSD-L081021> References: <20240515185103.20256-1-ddrokosov@salutedevices.com> <20240515185103.20256-5-ddrokosov@salutedevices.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Disposition: inline In-Reply-To: <20240515185103.20256-5-ddrokosov@salutedevices.com> User-Agent: NeoMutt/20220415 X-ClientProxiedBy: p-i-exch-sc-m02.sberdevices.ru (172.16.192.103) To p-i-exch-sc-m02.sberdevices.ru (172.16.192.103) X-KSMG-Rule-ID: 10 X-KSMG-Message-Action: clean X-KSMG-AntiSpam-Lua-Profiles: 185260 [May 15 2024] X-KSMG-AntiSpam-Version: 6.1.0.4 X-KSMG-AntiSpam-Envelope-From: ddrokosov@salutedevices.com X-KSMG-AntiSpam-Rate: 0 X-KSMG-AntiSpam-Status: not_detected X-KSMG-AntiSpam-Method: none X-KSMG-AntiSpam-Auth: dkim=none X-KSMG-AntiSpam-Info: LuaCore: 20 0.3.20 743589a8af6ec90b529f2124c2bbfc3ce1d2f20f, {Track_E25351}, {Tracking_from_domain_doesnt_match_to}, 127.0.0.199:7.1.2;smtp.sberdevices.ru:7.1.1,5.0.1;d41d8cd98f00b204e9800998ecf8427e.com:7.1.1;100.64.160.123:7.1.2;salutedevices.com:7.1.1, FromAlignment: s, ApMailHostAddress: 100.64.160.123 X-MS-Exchange-Organization-SCL: -1 X-KSMG-AntiSpam-Interceptor-Info: scan successful X-KSMG-AntiPhishing: Clean X-KSMG-LinksScanning: Clean X-KSMG-AntiVirus: Kaspersky Secure Mail Gateway, version 2.0.1.6960, bases: 2024/05/15 13:12:00 #25231738 X-KSMG-AntiVirus-Status: Clean, skipped Hello Conor, On Wed, May 15, 2024 at 09:47:27PM +0300, Dmitry Rokosov wrote: > The 'sys_pll' input is an optional clock that can be used to generate > 'sys_pll_div16', which serves as one of the sources for the GEN clock. > > Signed-off-by: Dmitry Rokosov I didn't tag this patch with your Acked-by because I've changed the connection between the A1 PLL and the A1 peripherals controllers from 'sys_pll_div16' to 'sys_pll'. Please review this patch again, if possible. > --- > .../bindings/clock/amlogic,a1-peripherals-clkc.yaml | 9 +++++++-- > include/dt-bindings/clock/amlogic,a1-peripherals-clkc.h | 1 + > 2 files changed, 8 insertions(+), 2 deletions(-) > > diff --git a/Documentation/devicetree/bindings/clock/amlogic,a1-peripherals-clkc.yaml b/Documentation/devicetree/bindings/clock/amlogic,a1-peripherals-clkc.yaml > index 6d84cee1bd75..2568ad7dd0ac 100644 > --- a/Documentation/devicetree/bindings/clock/amlogic,a1-peripherals-clkc.yaml > +++ b/Documentation/devicetree/bindings/clock/amlogic,a1-peripherals-clkc.yaml > @@ -30,6 +30,8 @@ properties: > - description: input fixed pll div7 > - description: input hifi pll > - description: input oscillator (usually at 24MHz) > + - description: input sys pll > + minItems: 6 # sys_pll is optional > > clock-names: > items: > @@ -39,6 +41,8 @@ properties: > - const: fclk_div7 > - const: hifi_pll > - const: xtal > + - const: sys_pll > + minItems: 6 # sys_pll is optional > > required: > - compatible > @@ -65,9 +69,10 @@ examples: > <&clkc_pll CLKID_FCLK_DIV5>, > <&clkc_pll CLKID_FCLK_DIV7>, > <&clkc_pll CLKID_HIFI_PLL>, > - <&xtal>; > + <&xtal>, > + <&clkc_pll CLKID_SYS_PLL>; > clock-names = "fclk_div2", "fclk_div3", > "fclk_div5", "fclk_div7", > - "hifi_pll", "xtal"; > + "hifi_pll", "xtal", "sys_pll"; > }; > }; > diff --git a/include/dt-bindings/clock/amlogic,a1-peripherals-clkc.h b/include/dt-bindings/clock/amlogic,a1-peripherals-clkc.h > index 06f198ee7623..2ce1a06dc735 100644 > --- a/include/dt-bindings/clock/amlogic,a1-peripherals-clkc.h > +++ b/include/dt-bindings/clock/amlogic,a1-peripherals-clkc.h > @@ -164,5 +164,6 @@ > #define CLKID_DMC_SEL 151 > #define CLKID_DMC_DIV 152 > #define CLKID_DMC_SEL2 153 > +#define CLKID_SYS_PLL_DIV16 154 > > #endif /* __A1_PERIPHERALS_CLKC_H */ > -- > 2.43.0 > -- Thank you, Dmitry