Received-SPF: pass (google.com: domain of linux-kernel+bounces-180388-linux.lists.archive=gmail.com@vger.kernel.org designates 147.75.199.223 as permitted sender) client-ip=147.75.199.223;
Feedback-ID: ifd894703:Fastmail
User-Agent: Cyrus-JMAP/3.11.0-alpha0-456-gcd147058c-fm-hotfix-20240509.001-g0aad06e4
Precedence: bulk
MIME-Version: 1.0
Message-Id: <4b8d0a71-f4b3-4c6b-b1e2-f67bb2908508@app.fastmail.com>
In-Reply-To: <alpine.DEB.2.21.2405150850270.45291@angie.orcam.me.uk>
References: <20240202-llvm-msym32-v1-0-52f0631057d6@flygoat.com>
 <20240202-llvm-msym32-v1-6-52f0631057d6@flygoat.com>
 <alpine.DEB.2.21.2405142235100.45291@angie.orcam.me.uk>
 <7fc82f8b-df9d-45f5-8e82-27eac7b4b0ab@app.fastmail.com>
 <alpine.DEB.2.21.2405150850270.45291@angie.orcam.me.uk>
Date: Wed, 15 May 2024 22:26:16 +0100
From: "Jiaxun Yang" <jiaxun.yang@flygoat.com>
To: "Maciej W. Rozycki" <macro@orcam.me.uk>
Cc: "Thomas Bogendoerfer" <tsbogend@alpha.franken.de>,
 "Nathan Chancellor" <nathan@kernel.org>,
 "Nick Desaulniers" <ndesaulniers@google.com>,
 "Bill Wendling" <morbo@google.com>, "Justin Stitt" <justinstitt@google.com>,
 "linux-mips@vger.kernel.org" <linux-mips@vger.kernel.org>,
 linux-kernel@vger.kernel.org, llvm@lists.linux.dev,
 "Guenter Roeck" <linux@roeck-us.net>
Subject: Re: [PATCH 6/8] MIPS: Limit MIPS_MT_SMP support by ISA reversion
Content-Type: text/plain;charset=utf-8
Content-Transfer-Encoding: quoted-printable


=E5=9C=A82024=E5=B9=B45=E6=9C=8815=E6=97=A5=E4=BA=94=E6=9C=88 =E4=B8=8B=E5=
=8D=882:43=EF=BC=8CMaciej W. Rozycki=E5=86=99=E9=81=93=EF=BC=9A
> On Wed, 15 May 2024, Jiaxun Yang wrote:
>
>> >> MIPS MT ASE is only available on ISA between Release 1 and Release=
 5.
>> >
>> >  R2+ only actually, as also evident from Kconfig...
>>=20
>> Hi Maciej,
>>=20
>> Long time no see :-)
>
>  It's not so easy to get rid of me. ;)
>
>> There is nothing stopping us to run R1 kernel on R2 hardware, given t=
hat
>> those features are all detected at boot time. I understand MT was int=
roduced
>> at 34K which is R2.
>
>  We can certainly choose to support R2 features at run time with R1 ke=
rnel=20
> configurations, but it's not what the change description says (left qu=
oted=20
> above for reference).  And the MT ASE, indeed first implemented with t=
he=20
> 34K (for which I was a member of the product development team back at =
MIPS=20
> UK), is not a part of the R1 ISA specification set.
>
Good to know!

The motivation behind this patch is to workaround some randconfig failur=
es
that combines MT with early ISA release.

They are not trivial to fix, so I just ban them in Kconfig. I was a litt=
le bit
reluctant to admit that in commit message.

Anyway, thanks for bringing that up.

--=20
- Jiaxun