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Subject: Re: [PATCH 0/2] riscv: Allow vlenb to be probed from DT
From: Jessica Clarke <jrtc27@jrtc27.com>
In-Reply-To: <20240515-add_vlenb_to_dt-v1-0-4ebd7cba0aa1@rivosinc.com>
Date: Wed, 15 May 2024 23:25:16 +0100
Cc: Conor Dooley <conor@kernel.org>,
 Paul Walmsley <paul.walmsley@sifive.com>,
 Palmer Dabbelt <palmer@dabbelt.com>,
 Albert Ou <aou@eecs.berkeley.edu>,
 Palmer Dabbelt <palmer@sifive.com>,
 linux-riscv <linux-riscv@lists.infradead.org>,
 "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" <devicetree@vger.kernel.org>,
 LKML <linux-kernel@vger.kernel.org>,
 Conor Dooley <conor.dooley@microchip.com>
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Message-Id: <A9EDD470-B8EC-4644-82A0-7444729EF885@jrtc27.com>
References: <20240515-add_vlenb_to_dt-v1-0-4ebd7cba0aa1@rivosinc.com>
To: Charlie Jenkins <charlie@rivosinc.com>

On 15 May 2024, at 22:50, Charlie Jenkins <charlie@rivosinc.com> wrote:
>=20
> The kernel currently requires all harts to have the same value in the
> vlenb csr that is present when a hart supports vector. In order to =
read
> this csr, the kernel needs to boot the hart. Adding vlenb to the DT =
will
> allow the kernel to detect the inconsistency early and not waste time
> trying to boot harts that it doesn't support.

That doesn=E2=80=99t seem sufficient justification to me. If it can be =
read
from the hardware, why should we have to put it in the FDT? The whole
point of the FDT is to communicate the hardware configuration that
isn=E2=80=99t otherwise discoverable.

As for T-HEAD stuff, if they need it they can have a custom property.
Though naively I=E2=80=99d assume there=E2=80=99s a way to avoid it =
still...

Jess