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From: "Lad, Prabhakar" <prabhakar.csengg@gmail.com>
Date: Thu, 16 May 2024 09:02:35 +0100
Message-ID: <CA+V-a8vN5YHX3NFJNmqxzQt6HB=xC1Srr12ZvzEWHhKe85YWSg@mail.gmail.com>
Subject: Re: [PATCH v2 00/13] Add PFC support for Renesas RZ/V2H(P) SoC
To: Geert Uytterhoeven <geert+renesas@glider.be>, Linus Walleij <linus.walleij@linaro.org>
Cc: linux-renesas-soc@vger.kernel.org, Conor Dooley <conor+dt@kernel.org>, 
	Krzysztof Kozlowski <krzk+dt@kernel.org>, Magnus Damm <magnus.damm@gmail.com>, 
	Rob Herring <robh@kernel.org>, linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, 
	linux-kernel@vger.kernel.org, Biju Das <biju.das.jz@bp.renesas.com>, 
	Fabrizio Castro <fabrizio.castro.jz@renesas.com>, 
	Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
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On Tue, Apr 23, 2024 at 6:59=E2=80=AFPM Prabhakar <prabhakar.csengg@gmail.c=
om> wrote:
>
> From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
>
> Hi All,
>
> This patch series aims to add PFC (Pin Function Controller) support for
> Renesas RZ/V2H(P) SoC. The PFC block on RZ/V2H(P) is almost similar to
> one found on the RZ/G2L family with couple of differences. To able to
> re-use the use the existing driver for RZ/V2H(P) SoC function pointers
> are introduced based on the SoC changes.
>
>
> RFC->v2
> - Fixed review comments pointed by Rob
> - Incorporated changes suggested by Claudiu
> - Fixed build error reported for m68K
> - Dropped IOLH groups as we will be passing register values
> - Fixed configs for dedicated pins
> - Added support for slew-rate and bias settings
> - Added support for OEN
>
> RFC: https://patchwork.kernel.org/project/linux-renesas-soc/cover/2024032=
6222844.1422948-1-prabhakar.mahadev-lad.rj@bp.renesas.com/
>
> Cheers,
> Prabhakar
>
> Lad Prabhakar (13):
>   dt-bindings: pinctrl: renesas,rzg2l-pinctrl: Remove the check from the
>     object
>   dt-bindings: pinctrl: renesas: Document RZ/V2H(P) SoC
>   pinctrl: renesas: pinctrl-rzg2l: Allow more bits for pin configuration
>   pinctrl: renesas: pinctrl-rzg2l: Allow parsing of variable
>     configuration for all architectures
>   pinctrl: renesas: pinctrl-rzg2l: Validate power registers for SD and
>     ETH
>   pinctrl: renesas: pinctrl-rzg2l: Add function pointers for
>     locking/unlocking the PFC register
>   pinctrl: renesas: pinctrl-rzg2l: Add function pointer for writing to
>     PMC register
>   pinctrl: renesas: pinctrl-rzg2l: Add function pointers for
>     reading/writing OEN register
>   pinctrl: renesas: pinctrl-rzg2l: Add support to configure the
>     slew-rate
>   pinctrl: renesas: pinctrl-rzg2l: Add support to set pulling up/down
>     the pins
>   pinctrl: renesas: pinctrl-rzg2l: Pass pincontrol device pointer to
>     pinconf_generic_parse_dt_config()
>   pinctrl: renesas: pinctrl-rzg2l: Add support for custom parameters
>   pinctrl: renesas: pinctrl-rzg2l: Add support for RZ/V2H SoC
>
Gentle ping.

Cheers,
Prabhakar

>  .../pinctrl/renesas,rzg2l-pinctrl.yaml        |  40 +-
>  drivers/pinctrl/renesas/pinctrl-rzg2l.c       | 640 ++++++++++++++++--
>  2 files changed, 617 insertions(+), 63 deletions(-)
>
> --
> 2.34.1
>