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From: Andrea della Porta <andrea.porta@suse.com>
Date: Thu, 16 May 2024 10:36:27 +0200
To: Florian Fainelli <florian.fainelli@broadcom.com>
Cc: Andrea della Porta <andrea.porta@suse.com>,
	Rob Herring <robh@kernel.org>,
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Subject: Re: [PATCH v2 4/4] arm64: dts: broadcom: Add support for BCM2712
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On 09:14 Fri 10 May     , Florian Fainelli wrote:
> On 5/10/24 07:35, Andrea della Porta wrote:
> 
> This should be #size-cells = <2> to be future proof and support over 4GB of
> DRAM, because the DDR controller and the memory map on that chip have been
> designed with that requirement.
> 
> > +
> > +	interrupt-parent = <&gicv2>;
> > +
> > +	axi: axi {
> > +		compatible = "simple-bus";
> > +		#address-cells = <2>;
> > +		#size-cells = <1>;
> > +		ranges;
> 
> The AXI peripheral window should be defined in the ranges property. The
> aperture is from 0x10_0000_0000 to 0x10_3FFF_FFFF.
> 
> From that point on you can define all peripherals under the axi node to be
> relative to that axi aperture, just like what you did for the legacy Pi
> peripherals in the subsequent bus node.

This doesn't seem to match with what I have here:
- some axi peripherals goes beyond 0x10_3FFF_FFFF (e.g. the interrupt
  controller is @0x107fff9000)
- downstream dts have that ranges going from 0x10 0x00000000 0x11 0x00000000,
  so to span all the peripheral (included e.g. the above int controller)
- another comment in downstream dts says: // 10_00000000-1x_xxxxxxxx = up to
  64GB system RAM

I'm a little confused here, of course we could also define multiple ranges
but I don't really know what the boundaries are. Anyway, I would opt for the
extended range (0x10 0x00000000 - 0x11 0x00000000) unless there is concern
about it. Any thoughts?

Many thanks,
Andrea