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AJvYcCVtOaKFb+SfEpxE+9T4s73+mwn+jquG8SFGZFvsfJ4Aydvymm7YLhZwnudGlZpC+kbGx0tRjR9L9dZ4zKeBGdUlvCulcXNJQolrlJAAF5+Ufu24syiK3Pkj2XKgZfVNSy/53ayXVdbpzA/xigdLYgHF5TFyUaVqlcqtSj1Pu2DVcVQYpw== X-Gm-Message-State: AOJu0YxtfWj5vq5K3aXGBO8lDMCxs/V9o4ZUIcKrjLuuNX8P/4Y8Juzo 0Tozg7ld1JwwBZfQ0b61XtPSArdX1n7VVyNiKuc2yvyUB+AQ+ODkakKXTmgI4Cao20oZNerqIfH hnj9I1o++peG08opSbg/D6DyT8vQ= X-Received: by 2002:a25:b853:0:b0:df3:6f11:923a with SMTP id 3f1490d57ef6-df36f11964emr3073402276.53.1715852853288; Thu, 16 May 2024 02:47:33 -0700 (PDT) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 References: <20240509192411.2432066-1-tmaimon77@gmail.com> <20240509192411.2432066-2-tmaimon77@gmail.com> <20240513155154.GA2595523-robh@kernel.org> In-Reply-To: <20240513155154.GA2595523-robh@kernel.org> From: Tomer Maimon Date: Thu, 16 May 2024 12:47:22 +0300 Message-ID: Subject: Re: [PATCH v24 1/4] dt-bindings: reset: npcm: add clock properties To: Rob Herring Cc: mturquette@baylibre.com, sboyd@kernel.org, p.zabel@pengutronix.de, krzysztof.kozlowski+dt@linaro.org, tali.perry1@gmail.com, joel@jms.id.au, venture@google.com, yuenn@google.com, benjaminfair@google.com, openbmc@lists.ozlabs.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Content-Type: text/plain; charset="UTF-8" Hi Rob, Thanks for your comments On Mon, 13 May 2024 at 18:51, Rob Herring wrote: > > On Thu, May 09, 2024 at 10:24:08PM +0300, Tomer Maimon wrote: > > Adding 25MHz reference clock and clock-cell properties to NPCM reset > > document due to the registration of the npcm8xx clock auxiliary bus device > > in the NPCM reset driver > > > > The NPCM8xx clock auxiliary bus device has been registered in the NPCM > > reset driver because the reset and the clock share the same register > > region. > > auxiliary bus is a Linux concept. The reasoning for this should be the > reset block also provides clocks. > > > > Signed-off-by: Tomer Maimon > > --- > > .../bindings/reset/nuvoton,npcm750-reset.yaml | 18 ++++++++++++++++++ > > 1 file changed, 18 insertions(+) > > > > diff --git a/Documentation/devicetree/bindings/reset/nuvoton,npcm750-reset.yaml b/Documentation/devicetree/bindings/reset/nuvoton,npcm750-reset.yaml > > index d82e65e37cc0..18db4de13098 100644 > > --- a/Documentation/devicetree/bindings/reset/nuvoton,npcm750-reset.yaml > > +++ b/Documentation/devicetree/bindings/reset/nuvoton,npcm750-reset.yaml > > @@ -21,6 +21,13 @@ properties: > > '#reset-cells': > > const: 2 > > > > + '#clock-cells': > > + const: 1 > > + > > + clocks: > > + items: > > + - description: specify external 25MHz referance clock. > > s/referance/reference/ > > > + > > nuvoton,sysgcr: > > $ref: /schemas/types.yaml#/definitions/phandle > > description: a phandle to access GCR registers. > > @@ -39,6 +46,17 @@ required: > > - '#reset-cells' > > - nuvoton,sysgcr > > > > +if: > > + properties: > > + compatible: > > + contains: > > + enum: > > + - nuvoton,npcm845-reset > > +then: > > + required: > > + - '#clock-cells' > > + - clocks > > New required properties are an ABI break. Please justify why that's okay > for this platform in the commit message (assuming that it is). will be done in next version > > Rob Thanks, Tomer