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From: Adam Ford <aford173@gmail.com>
Date: Thu, 16 May 2024 07:18:45 -0500
Message-ID: <CAHCN7x+Sv6_QQStEacjQP8UAVntyWHdvHrErQO0j=n_pe9zqmA@mail.gmail.com>
Subject: Re: [PATCH 06/18] clk: imx: pll14xx: use rate_table for audio plls
To: "Peng Fan (OSS)" <peng.fan@oss.nxp.com>
Cc: Abel Vesa <abelvesa@kernel.org>, Michael Turquette <mturquette@baylibre.com>, 
	Stephen Boyd <sboyd@kernel.org>, Shawn Guo <shawnguo@kernel.org>, 
	Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix Kernel Team <kernel@pengutronix.de>, 
	Fabio Estevam <festevam@gmail.com>, Jacky Bai <ping.bai@nxp.com>, Ye Li <ye.li@nxp.com>, 
	Dong Aisheng <aisheng.dong@nxp.com>, linux-clk@vger.kernel.org, imx@lists.linux.dev, 
	linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, 
	Abel Vesa <abel.vesa@linaro.org>, Peng Fan <peng.fan@nxp.com>, 
	Shengjiu Wang <shengjiu.wang@nxp.com>
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On Fri, May 3, 2024 at 7:42=E2=80=AFPM Peng Fan (OSS) <peng.fan@oss.nxp.com=
> wrote:
>
> From: Shengjiu Wang <shengjiu.wang@nxp.com>
>
> The generated clock frequency may not accurate, for example
> the expected rate is 361267200U, but result is 361267199U.
> Add rate_table for audio clocks to avoid such issue.

Wouldn't it be better to fix the clock calculator and eliminate the
look-up table completely?
The LUT seems like a work-around for a bug.

adam
>
> Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
> Reviewed-by: Jacky Bai <ping.bai@nxp.com>
> Signed-off-by: Peng Fan <peng.fan@nxp.com>
> ---
>  drivers/clk/imx/clk-pll14xx.c | 11 +++++++++++
>  1 file changed, 11 insertions(+)
>
> diff --git a/drivers/clk/imx/clk-pll14xx.c b/drivers/clk/imx/clk-pll14xx.=
c
> index 55812bfb9ec2..6b2c849f8b71 100644
> --- a/drivers/clk/imx/clk-pll14xx.c
> +++ b/drivers/clk/imx/clk-pll14xx.c
> @@ -64,6 +64,17 @@ static const struct imx_pll14xx_rate_table imx_pll1443=
x_tbl[] =3D {
>         PLL_1443X_RATE(650000000U, 325, 3, 2, 0),
>         PLL_1443X_RATE(594000000U, 198, 2, 2, 0),
>         PLL_1443X_RATE(519750000U, 173, 2, 2, 16384),
> +       PLL_1443X_RATE(393216000U, 262, 2, 3, 9437),
> +       PLL_1443X_RATE(361267200U, 361, 3, 3, 17511),
> +       PLL_1443X_RATE(245760000U, 328, 4, 3, 0xae15),
> +       PLL_1443X_RATE(225792000U, 226, 3, 3, 0xcac1),
> +       PLL_1443X_RATE(122880000U, 328, 4, 4, 0xae15),
> +       PLL_1443X_RATE(112896000U, 226, 3, 4, 0xcac1),
> +       PLL_1443X_RATE(61440000U, 328, 4, 5, 0xae15),
> +       PLL_1443X_RATE(56448000U, 226, 3, 5, 0xcac1),
> +       PLL_1443X_RATE(49152000U, 393, 3, 6, 0x374c),
> +       PLL_1443X_RATE(45158400U, 241, 2, 6, 0xd845),
> +       PLL_1443X_RATE(40960000U, 109, 1, 6, 0x3a07),
>  };
>
>  struct imx_pll14xx_clk imx_1443x_pll =3D {
>
> --
> 2.37.1
>
>