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Date: Thu, 16 May 2024 07:43:01 -0700
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References: <20240219074733.122080-1-weijiang.yang@intel.com>
 <20240219074733.122080-25-weijiang.yang@intel.com> <ZjLRnisdUgeYgg8i@google.com>
 <83bb5f3f-a374-4b0e-a26d-9a9d88561bbe@intel.com> <f77496b0-ee94-4690-803f-44650706640f@intel.com>
Message-ID: <ZkYbdaW-2p9wHwEL@google.com>
Subject: Re: [PATCH v10 24/27] KVM: x86: Enable CET virtualization for VMX and
 advertise to userspace
From: Sean Christopherson <seanjc@google.com>
To: Weijiang Yang <weijiang.yang@intel.com>
Cc: pbonzini@redhat.com, dave.hansen@intel.com, x86@kernel.org, 
	kvm@vger.kernel.org, linux-kernel@vger.kernel.org, peterz@infradead.org, 
	chao.gao@intel.com, rick.p.edgecombe@intel.com, mlevitsk@redhat.com, 
	john.allen@amd.com
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On Thu, May 16, 2024, Weijiang Yang wrote:
> On 5/6/2024 5:41 PM, Yang, Weijiang wrote:
> > On 5/2/2024 7:34 AM, Sean Christopherson wrote:
> > > On Sun, Feb 18, 2024, Yang Weijiang wrote:
> > > > @@ -665,7 +665,7 @@ void kvm_set_cpu_caps(void)
> > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 F(AVX512_VPO=
PCNTDQ) | F(UMIP) | F(AVX512_VBMI2) | F(GFNI) |
> > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 F(VAES) | F(=
VPCLMULQDQ) | F(AVX512_VNNI) | F(AVX512_BITALG) |
> > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 F(CLDEMOTE) =
| F(MOVDIRI) | F(MOVDIR64B) | 0 /*WAITPKG*/ |
> > > > -=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 F(SGX_LC) | F(BUS_LOCK_=
DETECT)
> > > > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 F(SGX_LC) | F(BUS_LOCK_=
DETECT) | F(SHSTK)
> > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 );
> > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 /* Set LA57 based on hardware capabi=
lity. */
> > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 if (cpuid_ecx(7) & F(LA57))
> > > > @@ -683,7 +683,8 @@ void kvm_set_cpu_caps(void)
> > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 F(SPEC_CTRL_=
SSBD) | F(ARCH_CAPABILITIES) | F(INTEL_STIBP) |
> > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 F(MD_CLEAR) =
| F(AVX512_VP2INTERSECT) | F(FSRM) |
> > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 F(SERIALIZE)=
 | F(TSXLDTRK) | F(AVX512_FP16) |
> > > > -=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 F(AMX_TILE) | F(AMX_INT=
8) | F(AMX_BF16) | F(FLUSH_L1D)
> > > > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 F(AMX_TILE) | F(AMX_INT=
8) | F(AMX_BF16) | F(FLUSH_L1D) |
> > > > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 F(IBT)
> > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 );
> > > ...
> > >=20
> > > > @@ -7977,6 +7993,18 @@ static __init void vmx_set_cpu_caps(void)
> > > > =C2=A0 =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 if (cpu_has_vmx_waitpkg())
> > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 kvm_cpu_cap_=
check_and_set(X86_FEATURE_WAITPKG);
> > > > +
> > > > +=C2=A0=C2=A0=C2=A0 /*
> > > > +=C2=A0=C2=A0=C2=A0=C2=A0 * Disable CET if unrestricted_guest is un=
supported as KVM doesn't
> > > > +=C2=A0=C2=A0=C2=A0=C2=A0 * enforce CET HW behaviors in emulator. O=
n platforms with
> > > > +=C2=A0=C2=A0=C2=A0=C2=A0 * VMX_BASIC[bit56] =3D=3D 0, inject #CP a=
t VMX entry with error code
> > > > +=C2=A0=C2=A0=C2=A0=C2=A0 * fails, so disable CET in this case too.
> > > > +=C2=A0=C2=A0=C2=A0=C2=A0 */
> > > > +=C2=A0=C2=A0=C2=A0 if (!cpu_has_load_cet_ctrl() || !enable_unrestr=
icted_guest ||
> > > > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 !cpu_has_vmx_basic_no_h=
w_errcode()) {
> > > > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 kvm_cpu_cap_clear(X86_F=
EATURE_SHSTK);
> > > > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 kvm_cpu_cap_clear(X86_F=
EATURE_IBT);
> > > > +=C2=A0=C2=A0=C2=A0 }
> > > Oh!=C2=A0 Almost missed it.=C2=A0 This patch should explicitly kvm_cp=
u_cap_clear()
> > > X86_FEATURE_SHSTK and X86_FEATURE_IBT.=C2=A0 We *know* there are upco=
ming AMD CPUs
> > > that support at least SHSTK, so enumerating support for common code w=
ould yield
> > > a version of KVM that incorrectly advertises support for SHSTK.
> > >=20
> > > I hope to land both Intel and AMD virtualization in the same kernel r=
elease, but
> > > there are no guarantees that will happen.=C2=A0 And explicitly cleari=
ng both SHSTK and
> > > IBT would guard against IBT showing up in some future AMD CPU in adva=
nce of KVM
> > > gaining full support.
> >=20
> > Let me be clear on this, you want me to disable SHSTK/IBT with
> > kvm_cpu_cap_clear() unconditionally for now in this patch, and wait unt=
il
> > both AMD's SVM patches and this series are ready for guest CET, then re=
move
> > the disabling code in this patch for final merge, am I right?

No, allow it to be enabled for VMX, but explicitly disable it for SVM, i.e.

diff --git a/arch/x86/kvm/svm/svm.c b/arch/x86/kvm/svm/svm.c
index 4aaffbf22531..b3df12af4ee6 100644
--- a/arch/x86/kvm/svm/svm.c
+++ b/arch/x86/kvm/svm/svm.c
@@ -5125,6 +5125,10 @@ static __init void svm_set_cpu_caps(void)
        kvm_caps.supported_perf_cap =3D 0;
        kvm_caps.supported_xss =3D 0;
=20
+       /* KVM doesn't yet support CET virtualization for SVM. */
+       kvm_cpu_cap_clear(X86_FEATURE_SHSTK);
+       kvm_cpu_cap_clear(X86_FEATURE_IBT);
+
        /* CPUID 0x80000001 and 0x8000000A (SVM features) */
        if (nested) {
                kvm_cpu_cap_set(X86_FEATURE_SVM);

Then the SVM series can simply delete those lines when all is ready.