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Subject: Re: [PATCH v2 0/4] acpi/ghes, cper, cxl: Trace FW-First CXL Protocol
 Errors
To: "Fabio M. De Francesco" <fabio.m.de.francesco@linux.intel.com>
Cc: linux-efi@vger.kernel.org, linux-kernel@vger.kernel.org,
 linux-cxl@vger.kernel.org, Ard Biesheuvel <ardb@kernel.org>,
 Alison Schofield <alison.schofield@intel.com>,
 Vishal Verma <vishal.l.verma@intel.com>, Ira Weiny <ira.weiny@intel.com>,
 Dan Williams <dan.j.williams@intel.com>,
 Jonathan Cameron <Jonathan.Cameron@huawei.com>,
 Yazen Ghannam <yazen.ghannam@amd.com>
References: <20240109034755.100555-1-Smita.KoralahalliChannabasappa@amd.com>
 <2649256.vYhyI6sBWr@fdefranc-mobl3>
From: Smita Koralahalli <Smita.KoralahalliChannabasappa@amd.com>
Message-ID: <43ab39e9-c9c2-bfe4-7d1c-bad462221c9c@amd.com>
Date: Thu, 16 May 2024 10:59:41 -0700
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Hi Fabio,

On 5/7/2024 2:35 AM, Fabio M. De Francesco wrote:
> On Tuesday, January 9, 2024 4:47:51 AM GMT+2 Smita Koralahalli wrote:
>> This patchset adds trace event support for FW-First Protocol Errors.
>>
>> This series depends on:
>> https://lore.kernel.org/linux-cxl/20231220-cxl-cper-v5-0-1bb8a4ca2c7a@intel.
>> com
>>
> Hello Smita,
> 
> I'm working on a small series of enhancement and additions to kernel logs and
> trace events in extlog_print() (ELOG). I'm interested to reuse from ELOG the
> infrastructure which you made to trace the CXL Protocol Errors.
> 
> I'm aware that this series depends on an old one from Ira which has been
> superseded by a different implementation and, furthermore, that this needs to
> be reworked   because the execution of this code may sleep while in atomic
> context.
> 
> I'd like to ask if you plan to fix and rebase this series to a current cxl
> branch. If so, I'll wait for the next version to integrate in ELOG.
> 
> Otherwise, if you are not anymore actively working on this series, please
> notice that I'd be glad to help by making the necessary changes and by porting
> your code to a current cxl branch (of course, retaining your authorship).
> 
> Thanks,
> 
> Fabio M. De Francesco

Sorry missed your message on my inbox. Yes, I will get back working on 
v3 on this early next week. Couldn't get a chance to continue due to 
other pcie work. Hopefully, I can get something out next week.

Thanks
Smita

>>
>> Link to v1:
>> https://lore.kernel.org/all/20240102150933.161009-1-Smita.KoralahalliChannab
>> asappa@amd.com
>>
>> Smita Koralahalli (4):
>>    acpi/ghes, cxl: Create a common CXL struct to handle different CXL
>>      CPER records
>>    efi/cper, cxl: Make definitions and structures global
>>    acpi/ghes, efi/cper: Recognize and process CXL Protocol Errors.
>>    acpi/ghes, cxl/pci: Trace FW-First CXL Protocol Errors
>>
>>   drivers/acpi/apei/ghes.c        | 22 ++++++++-
>>   drivers/cxl/core/pci.c          | 29 ++++++++++++
>>   drivers/cxl/cxlpci.h            |  3 ++
>>   drivers/cxl/pci.c               | 13 ++++--
>>   drivers/firmware/efi/cper_cxl.c | 79 ++++++++++++++++++++++++++++-----
>>   drivers/firmware/efi/cper_cxl.h |  7 +--
>>   include/linux/cper.h            |  4 ++
>>   include/linux/cxl-event.h       | 31 ++++++++++++-
>>   8 files changed, 166 insertions(+), 22 deletions(-)
> 
> 
> 
>