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[209.17.68.221]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-65c33343c2fsm2625572a12.41.2024.05.17.10.15.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 17 May 2024 10:15:39 -0700 (PDT) Date: Sat, 18 May 2024 02:15:38 +0900 From: Krzysztof =?utf-8?Q?Wilczy=C5=84ski?= To: Mrinmay Sarkar Cc: andersson@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org, konrad.dybcio@linaro.org, manivannan.sadhasivam@linaro.org, quic_shazhuss@quicinc.com, quic_nitegupt@quicinc.com, quic_ramkri@quicinc.com, quic_nayiluri@quicinc.com, quic_krichai@quicinc.com, quic_vbadigan@quicinc.com, quic_schintav@quicinc.com, Bjorn Helgaas , Lorenzo Pieralisi , Rob Herring , Krzysztof Kozlowski , linux-arm-msm@vger.kernel.org, linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v11 0/3] arm64: qcom: sa8775p: add support for EP PCIe Message-ID: <20240517171538.GH1947919@rocinante> References: <1714492540-15419-1-git-send-email-quic_msarkar@quicinc.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1714492540-15419-1-git-send-email-quic_msarkar@quicinc.com> Hello, > This series adds the relavent DT bindings, new compatible string, > and add EP PCIe node in dtsi file for ep pcie0 controller. Applied to qcom, thank you! [01/02] dt-bindings: PCI: qcom-ep: Add support for SA8775P SoC https://git.kernel.org/pci/pci/c/6baf8302442b [02/02] PCI: qcom-ep: Add support for SA8775P SOC https://git.kernel.org/pci/pci/c/a8c1b13ba036 Krzysztof