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Date: Fri, 17 May 2024 21:00:17 +0100
From: Conor Dooley <conor@kernel.org>
To: Kanak Shilledar <kanakshilledar@gmail.com>
Cc: Kanak Shilledar <kanakshilledar111@protonmail.com>,
	Thomas Gleixner <tglx@linutronix.de>, Rob Herring <robh@kernel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Conor Dooley <conor+dt@kernel.org>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Albert Ou <aou@eecs.berkeley.edu>,
	Samuel Holland <samuel.holland@sifive.com>,
	linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
	linux-riscv@lists.infradead.org
Subject: Re: [PATCH] dt-bindings: interrupt-controller: riscv,cpu-intc:
 convert to dtschema
Message-ID: <20240517-browsing-trespass-a46ef27fc115@spud>
References: <20240517150741.181303-1-kanakshilledar111@protonmail.com>
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On Fri, May 17, 2024 at 11:21:54PM +0530, Kanak Shilledar wrote:
> On Fri, May 17, 2024 at 9:34=E2=80=AFPM Conor Dooley <conor@kernel.org> w=
rote:
> > On Fri, May 17, 2024 at 08:37:40PM +0530, Kanak Shilledar wrote:
> > > +properties:
> > > +  compatible:
> > > +    const: "riscv,cpu-intc"
> >
> > A new warning with dtbs_check from your patch:
> > /stuff/linux/build/arch/riscv/boot/dts/renesas/r9a07g043f01-smarc.dtb: =
interrupt-controller: compatible:0: 'riscv,cpu-intc' was expected
> >         from schema $id: http://devicetree.org/schemas/interrupt-contro=
ller/riscv,cpu-intc.yaml#
> > /stuff/linux/build/arch/riscv/boot/dts/renesas/r9a07g043f01-smarc.dtb: =
interrupt-controller: compatible: ['andestech,cpu-intc', 'riscv,cpu-intc'] =
is too long
> >         from schema $id: http://devicetree.org/schemas/interrupt-contro=
ller/riscv,cpu-intc.yaml#
> >
> > There's a duplicate description in riscv/cpus.yaml:
> >   interrupt-controller:
> >     type: object
> >     additionalProperties: false
> >     description: Describes the CPU's local interrupt controller
> >
> >     properties:
> >       '#interrupt-cells':
> >         const: 1
> >
> >       compatible:
> >         oneOf:
> >           - items:
> >               - const: andestech,cpu-intc
> >               - const: riscv,cpu-intc
> >           - const: riscv,cpu-intc
> >
> >       interrupt-controller: true
> >
> > I think the one in cpus.yaml should be converted to a ref and the
> > andestech compatible added here.
>=20
> I am working on the v2 patch, in which I didn't provide any ref to the
> cpus.yaml and just replaced my compatible section with the one above
> to resolve the issue with `/renesas/r9a07g043f01-smarc.dtb`. I tested
> with others and didn't get any warnings.

Please don't do that, we shouldn't have two different places that each
are defining compatibles etc for the hardware.

Thanks,
Conor.


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