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bh=A+RQLhf8Q7V1V0kAlxyT1Z11xQC04LkQ5kVZhi2K2ws=; b=24WdP9pox0lXY4BP9mRsFw9HopQEoufDrv21zlVCaPhxgLiS34tz4NETEHl02mqnU0BI6Y jM8ay1Qb+/EqPRBw== From: "tip-bot2 for Uros Bizjak" Sender: tip-bot2@linutronix.de Reply-to: linux-kernel@vger.kernel.org To: linux-tip-commits@vger.kernel.org Subject: [tip: perf/urgent] perf/x86/amd: Use try_cmpxchg() in events/amd/{un,}core.c Cc: Uros Bizjak , Ingo Molnar , x86@kernel.org, linux-kernel@vger.kernel.org In-Reply-To: <20240425101708.5025-1-ubizjak@gmail.com> References: <20240425101708.5025-1-ubizjak@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-ID: <171602541885.10875.9262354688213911942.tip-bot2@tip-bot2> Robot-ID: Robot-Unsubscribe: Contact to get blacklisted from these emails Precedence: bulk Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit The following commit has been merged into the perf/urgent branch of tip: Commit-ID: cd84351c8c1baec86342d784feb884ace007d51c Gitweb: https://git.kernel.org/tip/cd84351c8c1baec86342d784feb884ace007d51c Author: Uros Bizjak AuthorDate: Thu, 25 Apr 2024 12:16:14 +02:00 Committer: Ingo Molnar CommitterDate: Sat, 18 May 2024 11:15:13 +02:00 perf/x86/amd: Use try_cmpxchg() in events/amd/{un,}core.c Replace this pattern in events/amd/{un,}core.c: cmpxchg(*ptr, old, new) == old .. with the simpler and faster: try_cmpxchg(*ptr, &old, new) The x86 CMPXCHG instruction returns success in the ZF flag, so this change saves a compare after the CMPXCHG. No functional change intended. Signed-off-by: Uros Bizjak Signed-off-by: Ingo Molnar Link: https://lore.kernel.org/r/20240425101708.5025-1-ubizjak@gmail.com --- arch/x86/events/amd/core.c | 4 +++- arch/x86/events/amd/uncore.c | 8 ++++++-- 2 files changed, 9 insertions(+), 3 deletions(-) diff --git a/arch/x86/events/amd/core.c b/arch/x86/events/amd/core.c index 1fc4ce4..18bfe34 100644 --- a/arch/x86/events/amd/core.c +++ b/arch/x86/events/amd/core.c @@ -433,7 +433,9 @@ static void __amd_put_nb_event_constraints(struct cpu_hw_events *cpuc, * when we come here */ for (i = 0; i < x86_pmu.num_counters; i++) { - if (cmpxchg(nb->owners + i, event, NULL) == event) + struct perf_event *tmp = event; + + if (try_cmpxchg(nb->owners + i, &tmp, NULL)) break; } } diff --git a/arch/x86/events/amd/uncore.c b/arch/x86/events/amd/uncore.c index 4ccb8fa..0fafe23 100644 --- a/arch/x86/events/amd/uncore.c +++ b/arch/x86/events/amd/uncore.c @@ -162,7 +162,9 @@ static int amd_uncore_add(struct perf_event *event, int flags) /* if not, take the first available counter */ hwc->idx = -1; for (i = 0; i < pmu->num_counters; i++) { - if (cmpxchg(&ctx->events[i], NULL, event) == NULL) { + struct perf_event *tmp = NULL; + + if (try_cmpxchg(&ctx->events[i], &tmp, event)) { hwc->idx = i; break; } @@ -196,7 +198,9 @@ static void amd_uncore_del(struct perf_event *event, int flags) event->pmu->stop(event, PERF_EF_UPDATE); for (i = 0; i < pmu->num_counters; i++) { - if (cmpxchg(&ctx->events[i], event, NULL) == event) + struct perf_event *tmp = event; + + if (try_cmpxchg(&ctx->events[i], &tmp, NULL)) break; }