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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: =?utf-8?B?akZveXovbHY1ei93T2pVbFBROVFHbzhGb09wNS9hL1hwMEIwY3hGdUpmbmc2?= =?utf-8?B?dmJDQ1QzTUhwSHVnNVRBQWNxdDFUM3U0SlkwdWNjVis0WWJOc0N4Q3BCRmJ1?= =?utf-8?B?bmVicjY1bFFXbXBPQjhTZGNTc2l2NUFFYzhvMTFYUHR1dE14aXlJbFFyajF1?= =?utf-8?B?alY2V3JvdVJ2cmVSVWd4ZHQ2YXRBcnRycTNlT1phZTc4ZGtTSTlxMGFzc3h1?= =?utf-8?B?UlpsdG5NNW5IcXoyS3dKaExXdVZYT2xZYllZRkluWmlLWHA3M21Yc0NDTTY3?= =?utf-8?B?WWdWc01BQWdGbEtXbEovUWx5UGtwZk5aUWh0OHVRbTFKc1R2TTBvNEpybkxO?= =?utf-8?B?T09raFNxa2dzY2RraUp5NGg4Mlp5cjdxcE44Y3hKUkFNOHB2S1pZZll1TEhi?= =?utf-8?B?UVQ1emxUVktSU25POE51NHFMOTY3U2o0OGNlVVNucFVvZ2tmSVp5RTdRY0VL?= =?utf-8?B?MUpjeXFyd1hsZjlKWGorYmRLb2djTGp4bUdFSGhXdkxtblFRTWNjazhWMkYw?= =?utf-8?B?WDdQNGhiQ2VLRUNFeW12dm41bmhNZFBVZVZ1cFZ6YmZFeERZSVJJRm5Yb1F0?= =?utf-8?B?RUx2TituRFI4VXpzS0JMcloweHFKY3lTN09CdEFRUC9NK3RvR1p2WU5ML0RI?= =?utf-8?B?alQxT2JZbUxkVmU1SWFiaGFRRWVSNjBVK2NaRjVPKy8vVTFBMTQ3ZlhHZUxO?= =?utf-8?B?SFFIbiswbHJzL0cxYmlrUVdZbWpqajZNdFZBSEp0aXloNmNqTldWTGl6TlFK?= =?utf-8?B?Q0pJNk91OU1CdFBtOUpaV0NXaGVJa0FnbUZrVUtVSnJuRDNpTWg0TEtCQXUv?= =?utf-8?B?RmdBNUxZQTNxQ3NxL0diTmNwQkpzK1lNdUdGNWNGMWM0YUh0ejZDdHJpU2Fp?= =?utf-8?B?ZGI3ZVc3eDU2N2s4RDRhaC92cWFxTlRpNDlNQ2xIREFyTzZETmFTOFJqajJl?= =?utf-8?B?WDFidDZxVkQ2Y2Q2azZZVTh4Und2dzZta1hmM2Z4MWluVjBockVNWHdoa045?= =?utf-8?B?ME1qbDNUTDNpRUIza0Y2RGxNaTIrakNmSjZKSGhWM0RDcXZhZUh5bkZOSnl4?= =?utf-8?B?WlViMU5kRW5DRnoveWpGSXR2ekRGN0hjMkNuNjl4TVJyemNXUlR3dXNleGFw?= =?utf-8?B?MVVpRGJ0bUlKcmZ2cEZFMlhXNG5SMmVaMEQxMmVDdmRDNTFHbTNidkYvUEdE?= =?utf-8?B?TlZZekl3OUViMTZLQjFJdHpyYlNTTzFaOUVJMHhvbHBnZzhpN3ZubGlXaURC?= =?utf-8?B?bGV5VE9oYjFtZmFvV1NUdGpRWnNtWkhmTC9MNjBUL3NtUmJqK3Z0dXRQNFVa?= =?utf-8?B?S0UxZUtBeUhmUGhwOEhHbXlLMHUzdjF1bDBsbFgrU25lRC90MklDcm5BTXJV?= =?utf-8?B?ZkRLYXl0RlFiYktsU1Q4M2ZWdEVoWHhxZWZlRy9DTjcycmdaZk8zeURwQ09U?= =?utf-8?B?VWE0Um5VeUZUcWFBRUdpZFZsc1djWUduQ3lkTjhPMytWVS84c0UyZ3BxMUFT?= =?utf-8?B?WEJjbXFLQUF4L2xqWmR4ZnYrbWhtYW5LWGlkdVVLTlByQlVjQkljV1o5TllC?= =?utf-8?B?THV4bkVqT25mWnlxZ3ZsMTBoRm8xb3lqN3Z6VXJscmttM3QrU091ZWxiWDEr?= =?utf-8?B?NDlNeVNmdERNVngyZ0ZFUkpQNmlvT2ZnTGQ2UElzTWI4RmF6TGZoYkVTTTVK?= =?utf-8?B?VWVvRnpoc05Zd1JqY3kvd0xtZFpLakZJUUpodzNjNHJiVW93blMzYnhJS1RB?= =?utf-8?B?VWh2TXcwMVlUdWJMYitmcDhkNk92MjZtY096NWJ6Q0lyT3hMSnVEQmI4c0hJ?= =?utf-8?B?ZGpZQVZhYjhHbmpBa3AwSWRuNDd6eGpzRk5SampFblFvOENPM2ZVcVYreUt6?= =?utf-8?B?Y1BLQVQxU1dxY3RjeXh2KytheXZWSWNSU3lLaDRYTmRMZTROUHVicUVHNXJG?= =?utf-8?B?ZEt6VEtsOFE3U3hFOW5Gd0Y1SkRTeUVIL0VhVmlFMTBtOGFISUx6QWU4NmZL?= =?utf-8?B?WE9UdndxQTFWdjBvTTl2THIvMUd5MGFBenpod1lvZzZSd3hzenIreWhDTEdR?= =?utf-8?B?SWIyMFI4V1p3QmtEQzgxbFJJVTh5VVJ0dzVORlNTdmg5WlUxaGRSUmlzdVJR?= =?utf-8?B?eHZPWHJKTnE1ZDJ5aytmUnIyd25iMjJzMWhPM1BNcnAvUGhLb1hnZStjS0VL?= =?utf-8?B?U3c9PQ==?= X-MS-Exchange-CrossTenant-Network-Message-Id: 8f309934-c4e1-4e9e-f8ed-08dc78b160dd X-MS-Exchange-CrossTenant-AuthSource: PH0PR11MB4965.namprd11.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 20 May 2024 09:44:01.3190 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 46c98d88-e344-4ed4-8496-4ed7712e255d X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: fSuoqoz902kXX2KlpZ5P8/nPlK09hrXofweBt7KiBX0GmnMREJK/q9QYy9gyrD8FVaqTbdz4gk8EjgKKlW/4mw== X-MS-Exchange-Transport-CrossTenantHeadersStamped: MW4PR11MB6863 X-OriginatorOrg: intel.com On 5/17/2024 10:26 PM, Sean Christopherson wrote: > On Fri, May 17, 2024, Thomas Gleixner wrote: >> On Thu, May 16 2024 at 07:39, Sean Christopherson wrote: >>> On Thu, May 16, 2024, Weijiang Yang wrote: >>>> We synced the issue internally, and got conclusion that KVM should honor host >>>> IBT config. In this case IBT bit in boot_cpu_data should be honored.  With >>>> this policy, it can avoid CPUID confusion to guest side due to host ibt=off >>>> config. >>> What was the reasoning? CPUID confusion is a weak justification, e.g. it's not >>> like the guest has visibility into the host kernel, and raw CPUID will still show >>> IBT support in the host. >>> >>> On the other hand, I can definitely see folks wanting to expose IBT to guests >>> when running non-complaint host kernels, especially when live migration is in >>> play, i.e. when hiding IBT from the guest will actively cause problems. >> I have to disagree here violently. >> >> If the exposure of a CPUID bit to a guest requires host side support, >> e.g. in xstate handling, then exposing it to a guest is simply not >> possible. > Ya, I don't disagree, I just didn't realize that CET_USER would be cleared in the > supported xfeatures mask. For host side support, fortunately,  this patch already has some checks for that. But for userspace CPUID config, it allows IBT to be exposed alone. IIUC, this series tries to tie IBT to SHSTK feature, i.e., IBT cannot be exposed as an independent feature to guest without exposing SHSTK at the same time. If it is, then below patch is not needed anymore: https://lore.kernel.org/all/20240219074733.122080-3-weijiang.yang@intel.com/ I'd check and clear IBT bit from CPUID when userspace enables only IBT via KVM_SET_CPUID2. And update related code of the series given the implicit dependency. Thanks!