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charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Il 26/04/24 19:22, Alexandre Mergnat ha scritto: > Add ADDA Device Audio Interface support for MT8365 SoC. > > Signed-off-by: Alexandre Mergnat > --- > sound/soc/mediatek/mt8365/mt8365-dai-adda.c | 315 ++++++++++++++++++++++++++++ > 1 file changed, 315 insertions(+) > > diff --git a/sound/soc/mediatek/mt8365/mt8365-dai-adda.c b/sound/soc/mediatek/mt8365/mt8365-dai-adda.c > new file mode 100644 > index 000000000000..65d45010ac90 > --- /dev/null > +++ b/sound/soc/mediatek/mt8365/mt8365-dai-adda.c > @@ -0,0 +1,315 @@ > +// SPDX-License-Identifier: GPL-2.0 > +/* > + * Mediatek 8365 ALSA SoC Audio DAI ADDA Control > + * > + * Copyright (c) 2024 MediaTek Inc. > + * Authors: Jia Zeng > + * Alexandre Mergnat > + */ > + > +#include > +#include > +#include > +#include "mt8365-afe-clk.h" > +#include "mt8365-afe-common.h" > +#include "../common/mtk-dai-adda-common.h" > + > +static int adda_afe_on_ref_cnt; > + > +/* DAI Drivers */ > + > +static int mt8365_dai_set_adda_out(struct mtk_base_afe *afe, unsigned int rate) > +{ > + unsigned int val; > + if (rate == 8000 || rate == 16000) val = AFE_ADDA_DL_VOICE_DATA; else val = 0; > + switch (rate) { > + case 8000: > + val = AFE_ADDA_DL_VOICE_DATA; > + break; > + case 16000: > + val = AFE_ADDA_DL_VOICE_DATA; > + break; > + default: > + val = 0; > + } > + > + val |= FIELD_PREP(AFE_ADDA_DL_SAMPLING_RATE, > + mtk_adda_dl_rate_transform(afe, rate)); > + val |= AFE_ADDA_DL_8X_UPSAMPLE | > + AFE_ADDA_DL_MUTE_OFF_CH1 | > + AFE_ADDA_DL_MUTE_OFF_CH2 | > + AFE_ADDA_DL_DEGRADE_GAIN; > + > + regmap_update_bits(afe->regmap, AFE_ADDA_PREDIS_CON0, 0xffffffff, 0); > + regmap_update_bits(afe->regmap, AFE_ADDA_PREDIS_CON1, 0xffffffff, 0); > + regmap_update_bits(afe->regmap, AFE_ADDA_DL_SRC2_CON0, 0xffffffff, val); > + /* SA suggest apply -0.3db to audio/speech path */ > + regmap_update_bits(afe->regmap, AFE_ADDA_DL_SRC2_CON1, > + 0xffffffff, 0xf74f0000); > + /* SA suggest use default value for sdm */ > + regmap_update_bits(afe->regmap, AFE_ADDA_DL_SDM_DCCOMP_CON, > + 0xffffffff, 0x0700701e); > + > + return 0; > +} > + > +static int mt8365_dai_set_adda_in(struct mtk_base_afe *afe, unsigned int rate) > +{ > + unsigned int val; > + > + val = FIELD_PREP(AFE_ADDA_UL_SAMPLING_RATE, > + mtk_adda_ul_rate_transform(afe, rate)); > + regmap_update_bits(afe->regmap, AFE_ADDA_UL_SRC_CON0, > + AFE_ADDA_UL_SAMPLING_RATE, val); > + /* Using Internal ADC */ > + regmap_update_bits(afe->regmap, AFE_ADDA_TOP_CON0, 0x1, 0x0); > + > + return 0; > +} > + > +int mt8365_dai_enable_adda_on(struct mtk_base_afe *afe) > +{ > + unsigned long flags; > + struct mt8365_afe_private *afe_priv = afe->platform_priv; > + > + spin_lock_irqsave(&afe_priv->afe_ctrl_lock, flags); > + > + adda_afe_on_ref_cnt++; > + if (adda_afe_on_ref_cnt == 1) > + regmap_update_bits(afe->regmap, AFE_ADDA_UL_DL_CON0, > + AFE_ADDA_UL_DL_ADDA_AFE_ON, > + AFE_ADDA_UL_DL_ADDA_AFE_ON); > + > + spin_unlock_irqrestore(&afe_priv->afe_ctrl_lock, flags); > + > + return 0; > +} > + > +int mt8365_dai_disable_adda_on(struct mtk_base_afe *afe) > +{ > + unsigned long flags; > + struct mt8365_afe_private *afe_priv = afe->platform_priv; > + > + spin_lock_irqsave(&afe_priv->afe_ctrl_lock, flags); > + > + adda_afe_on_ref_cnt--; > + if (adda_afe_on_ref_cnt == 0) > + regmap_update_bits(afe->regmap, AFE_ADDA_UL_DL_CON0, > + AFE_ADDA_UL_DL_ADDA_AFE_ON, > + ~AFE_ADDA_UL_DL_ADDA_AFE_ON); > + else if (adda_afe_on_ref_cnt < 0) > + adda_afe_on_ref_cnt = 0; Should we dev_warn() here? The refcount should never be less than zero - if it is, then there's some issue somewhere that must be solved. > + > + spin_unlock_irqrestore(&afe_priv->afe_ctrl_lock, flags); > + > + return 0; > +} > + Cheers, Angelo