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Mon, 20 May 2024 05:24:00 -0700 From: Sameer Pujar To: , , CC: , , , , , Subject: [PATCH 0/2] Virtualization support for Tegra ADMA Date: Mon, 20 May 2024 12:23:49 +0000 Message-ID: <20240520122351.1691058-1-spujar@nvidia.com> X-Mailer: git-send-email 2.45.1 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CY4PEPF0000EE31:EE_|SA3PR12MB9178:EE_ X-MS-Office365-Filtering-Correlation-Id: 7572be15-2d30-4249-89ec-08dc78c7c41e X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230031|376005|36860700004|82310400017|1800799015; X-Microsoft-Antispam-Message-Info: =?us-ascii?Q?CZQ39v+/Fr3wDHxwgymnfXMOrYNQZwerfiFioXz6NV+5dLN5zL3AoklShrPl?= =?us-ascii?Q?zsNONmIIreL3pf8XpWrdPoyO8Ll29Nrs+mClba/aONG4Q2D1XT3FRT+9RWic?= =?us-ascii?Q?rELx9tWRHmEJoRC7qy4XgPk7Ah7X7Jvcq/OiUAQ1ggzRVJdq1p7qLL+qLHDc?= =?us-ascii?Q?YtoRxbx+Aj4x96dAGaCNxg/HNpTcULG2PiyOme4CFlAhftAROKPIdC0ABVAw?= =?us-ascii?Q?eb63TgLTt8D9wiBnwBgtd+6bmLoeJC22oUvCvfsqxJgQfjobklwXmiHs5vwL?= =?us-ascii?Q?59UJx9glvAEKBXAh+jIy/k37VNj7eVuSZknNlbhdFQw44KF6t1Ggoe3z1Hd7?= =?us-ascii?Q?k/bHmaQYoIupV/umNQ9STtaOey5JgoZ9d7AXYebwczesw0dWxgyVeBbeBvn5?= =?us-ascii?Q?NgLuGFLmV+/DPbol+T5l8fzY8bnyKkDEDFT76JaJHGB9wrqKZJrbC+ZZmdMY?= =?us-ascii?Q?aAJ6Q0+PlA5VWrqEbA4XjV4vZzfIkcdzZg4pQ63W1KbVjDBx3wsP+IWD/zV4?= =?us-ascii?Q?Ys62eeO9AD4oVlkOUFDU/tMKghH+StvyujONLM250IpajhiUOs9mbugwTIbh?= =?us-ascii?Q?cqZeM+MDBZmo5mp/UCXkGbc1/MW4mcOlbHHHnt4K6j2d8Ys7EHnEb/evSbMo?= =?us-ascii?Q?cLfdk9Pkm6lJuadFR11LvqEOIHBoEKa2EDgHPI7wyWWhBkyLcejhrNA4Vnz+?= =?us-ascii?Q?/RaF3IwGD8+QJyNt+U3MK70UMuJPU8BHzjSOjDK3EBn0nZtVnnGsLdsFV+io?= =?us-ascii?Q?oZo/ceHM75c1pN7lmw26IEJuZdyI3jMQ5DgcYdUN0laZJDR+KeK7hJ+3ABqy?= =?us-ascii?Q?0A5SF3jqYjjEPlGaG7HsY7+6uhHwDjRHN+BaJ9X2/z/eSc6dTu/Duei0gpe/?= =?us-ascii?Q?eUfczEAvEDL8JrS6KJvPaS9F5Zkm0dN3pl2jOHbud+ltNrVgaHw2Z0HvzMyx?= =?us-ascii?Q?7OJnGx7PJcOM8JffvuUFB1FrvDOk7L2p27N0BQEWJQEo6fPoqcqNwOyecs/T?= =?us-ascii?Q?LqoGoek1pBUQeR4/m1i65jQs/dRyv7gSLgsApOoy0oMXZ0PtmEQU56yHbLvv?= =?us-ascii?Q?92tmMzvLMGWGSbYA5zqkH3pwtWggcz/oA0+W8PJFbDuSJj4JedLwdfu8/OcV?= =?us-ascii?Q?DBPqel+H9m48ltOVvcmUpA5w0a03c2Tg535IepI+8+rA44QWR97x5xLNaT11?= =?us-ascii?Q?jDGtdt3CL17EGDcgLYeiwwdtll9LG7DVbc33wDMgFz9wqNXaPnEUU9JU5CCa?= =?us-ascii?Q?q4S+GXm4Q4LCaa9GFPs5kCfZomGvQkfCE2NtviyUbpjK9mZXmxrerIiC95mY?= =?us-ascii?Q?YsfzoT1x0I6UnegTrL4Rl2/2kN94Pi+9uuWGL8TDbf54vzX2lCJlYuxSpoJj?= =?us-ascii?Q?sroAQhy/qvc4Rtr8OddUWQG+AYkf?= X-Forefront-Antispam-Report: CIP:216.228.117.160;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc6edge1.nvidia.com;CAT:NONE;SFS:(13230031)(376005)(36860700004)(82310400017)(1800799015);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 20 May 2024 12:24:16.2706 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 7572be15-2d30-4249-89ec-08dc78c7c41e X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.160];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: CY4PEPF0000EE31.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SA3PR12MB9178 From: Mohan Kumar Tegra ADMA HW supports multiple PAGES for virtualization, to support virtualization - reg-names property has been added to DT binding for the hypervisor mode. - In hypervisor mode the ADMA global registers are not accessed by guest. Mohan Kumar (2): dt-bindings: dma: Add reg-names to nvidia,tegra210-adma dmaengine: tegra210-adma: Add support for ADMA virtualization .../bindings/dma/nvidia,tegra210-adma.yaml | 10 +++++ drivers/dma/tegra210-adma.c | 44 +++++++++++++++---- 2 files changed, 46 insertions(+), 8 deletions(-) -- 2.45.1