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Date: Mon, 20 May 2024 11:16:02 -0500
From: Rob Herring <robh@kernel.org>
To: Shengjiu Wang <shengjiu.wang@nxp.com>
Cc: lgirdwood@gmail.com, broonie@kernel.org,
	krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org,
	shengjiu.wang@gmail.com, linux-sound@vger.kernel.org,
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
	Xiubo.Lee@gmail.com, festevam@gmail.com, nicoleotsuka@gmail.com,
	perex@perex.cz, tiwai@suse.com, alsa-devel@alsa-project.org,
	linuxppc-dev@lists.ozlabs.org
Subject: Re: [PATCH v2 1/2] ASoC: dt-bindings: fsl,xcvr: Add compatible
 string for i.MX95
Message-ID: <20240520161602.GA733483-robh@kernel.org>
References: <1715656329-8061-1-git-send-email-shengjiu.wang@nxp.com>
 <1715656329-8061-2-git-send-email-shengjiu.wang@nxp.com>
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In-Reply-To: <1715656329-8061-2-git-send-email-shengjiu.wang@nxp.com>

On Tue, May 14, 2024 at 11:12:08AM +0800, Shengjiu Wang wrote:
> Add compatible string "fsl,imx95-xcvr" for i.MX95 platform.
> 
> The difference between each platform is in below table.
> 
> +---------+--------+----------+--------+
> |  SOC	  |  PHY   | eARC/ARC | SPDIF  |
> +---------+--------+----------+--------+
> | i.MX8MP |  V1    |  Yes     |  Yes   |
> +---------+--------+----------+--------+
> | i.MX93  |  N/A   |  N/A     |  Yes   |
> +---------+--------+----------+--------+
> | i.MX95  |  V2    |  N/A     |  Yes   |
> +---------+--------+----------+--------+
> 
> On i.MX95, there are two PLL clock sources, they are the parent
> clocks of the XCVR root clock. one is for 8kHz series rates, named
> as 'pll8k', another one is for 11kHz series rates, named as 'pll11k'.
> They are optional clocks, if there are such clocks, then the driver
> can switch between them to support more accurate sample rates.
> 
> As 'pll8k' and 'pll11k' are optional, then add 'minItems: 4'
> for clocks and clock-names properties.
> 
> Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
> ---
>  .../devicetree/bindings/sound/fsl,xcvr.yaml   | 55 +++++++++++++++----
>  1 file changed, 45 insertions(+), 10 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/sound/fsl,xcvr.yaml b/Documentation/devicetree/bindings/sound/fsl,xcvr.yaml
> index 0eb0c1ba8710..70bcde33e986 100644
> --- a/Documentation/devicetree/bindings/sound/fsl,xcvr.yaml
> +++ b/Documentation/devicetree/bindings/sound/fsl,xcvr.yaml
> @@ -22,6 +22,7 @@ properties:
>      enum:
>        - fsl,imx8mp-xcvr
>        - fsl,imx93-xcvr
> +      - fsl,imx95-xcvr
>  
>    reg:
>      items:
> @@ -44,18 +45,12 @@ properties:
>      minItems: 1
>  
>    clocks:
> -    items:
> -      - description: Peripheral clock
> -      - description: PHY clock
> -      - description: SPBA clock
> -      - description: PLL clock

Leave these here and add pll8k and pll11k.

> +    minItems: 4

Keep this.

> +    maxItems: 6
>  
>    clock-names:
> -    items:
> -      - const: ipg
> -      - const: phy
> -      - const: spba
> -      - const: pll_ipg
> +    minItems: 4
> +    maxItems: 6

Same here.

>  
>    dmas:
>      items:
> @@ -97,6 +92,46 @@ allOf:
>        properties:
>          interrupts:
>            maxItems: 1
> +  - if:
> +      properties:
> +        compatible:
> +          contains:
> +            enum:
> +              - fsl,imx95-xcvr
> +    then:
> +      properties:
> +        clocks:
> +          items:
> +            - description: Peripheral clock
> +            - description: PHY clock
> +            - description: SPBA clock
> +            - description: PLL clock
> +            - description: PLL clock source for 8kHz series
> +            - description: PLL clock source for 11kHz series
> +          minItems: 4
> +        clock-names:
> +          items:
> +            - const: ipg
> +            - const: phy
> +            - const: spba
> +            - const: pll_ipg
> +            - const: pll8k
> +            - const: pll11k
> +          minItems: 4

Drop all this.

> +    else:
> +      properties:
> +        clocks:
> +          items:
> +            - description: Peripheral clock
> +            - description: PHY clock
> +            - description: SPBA clock
> +            - description: PLL clock
> +        clock-names:
> +          items:
> +            - const: ipg
> +            - const: phy
> +            - const: spba
> +            - const: pll_ipg

And for this case, you just need 'maxItems: 4'.

Rob