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Message-ID: <b1def408-f6e8-4ab5-ac7a-52f11f490337@intel.com>
Date: Tue, 21 May 2024 11:49:53 +1200
User-Agent: Mozilla Thunderbird
Subject: Re: [PATCH 2/9] KVM: nVMX: Initialize #VE info page for vmcs02 when
 proving #VE support
To: Sean Christopherson <seanjc@google.com>
CC: Paolo Bonzini <pbonzini@redhat.com>, <kvm@vger.kernel.org>,
	<linux-kernel@vger.kernel.org>
References: <20240518000430.1118488-1-seanjc@google.com>
 <20240518000430.1118488-3-seanjc@google.com>
 <78b3a0ef-54dc-4f49-863e-fe8288a980a7@intel.com>
 <ZkvbUNGEZwUHgHV9@google.com>
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From: "Huang, Kai" <kai.huang@intel.com>
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 =?utf-8?B?T1IxVHhmM1cvUzRCNkFpMjZtWXZTWS9Ob2VhSHZrRU50T2JTU2NJbFlMMVcr?=
 =?utf-8?B?UGJxRi9UU0Q5NmJDbGE1cTZxdHEySEhCUExnZGFqNlE5NTZwOVBaL3pLVDVV?=
 =?utf-8?B?VktWL0tPMFNyYWxCTzlLOXBXdFJWbXg0b014MGsvZ3NwUEdCNHBlRmpiY2U2?=
 =?utf-8?B?SG42d3FkR0JTVGNQaG5YeEN1UlFlTTFRaHdOUld6RTlkMm8zdW5GL0plQVFr?=
 =?utf-8?B?dzQwZThLcHZmdmNDekc2eVB3RzdKc2hoN1ZxRFAvSE9taVpCdTBzTjExWmtO?=
 =?utf-8?B?N2tRQ3JGZFNubGZHNy9vWmR2MGlQV2RJUWVVbCs1eGhPNWlGMU5SR053Rlk0?=
 =?utf-8?B?eTZ0KzIwS3NXREg3UXJMVVQxOXEvTVBpQ2ZwUkVpQlhaemhtME5ndDRzYkMv?=
 =?utf-8?B?TWpkUHNsSS9kNS9zUWpZcGozdDVKUk00WG14Q1loTk1ZcVNwZUt2MjU2NGMz?=
 =?utf-8?B?Y05pQy84QWhnSnp6MUllLzhUdXFMMHNUOWEvSXlSMUhUMVl1a3B3Vmk3QWxi?=
 =?utf-8?B?MkRiZFJnaFVyNlZhVXZNUFQ5RUV6ektlMGw1Ri9scVRxa2EyczU1SVBMbkxx?=
 =?utf-8?B?NStQVGFac0dIOURpKzE5MFBTUk01YVNVaS9zSXZkQ2ZrRW52RFRRcFVEWnpJ?=
 =?utf-8?B?N1JRSTNmZWs2TVlKVWxmN0xTbXZPcFZVTGpHUUkrc0hLWGZoREQ0bEQ1eEJu?=
 =?utf-8?B?SGVuaUlpblpIeVNRSm9yQ012V0dRanhIdHhCbkkwZVZhNXdmdWhzUld0ekFr?=
 =?utf-8?B?bENFT2pzNGxHR0tpaTVlS0Q5RjdTWkRVeTErVHV5c1V6dkJhV1RaV0tKalVI?=
 =?utf-8?B?cmxaTjllcHBVWGIwYlBSRkVScG83Q3NLUGkzSzJFK0c1bWRIWHRWdGc5c05l?=
 =?utf-8?B?VE1QOEptWk00cXpiTGlnanRHQjVwMHJEcUsrNVV5ZEpGV2ZOb1FiWHU5UWJj?=
 =?utf-8?B?bVZ1Z0NGSndISXFwR1dCRTVFbDBZODNtSjlnSCt2U1NmQ0FNTW9EWmN1VWlj?=
 =?utf-8?B?VzhzVnFDRnFwNTlvbUh1cGUzNWVHT2VJQWZLR2pHaDYyMndIUDRrN0JvbFdU?=
 =?utf-8?B?b0pESTBERVFtaE5nS1k2QmtIVnRZSlU3eVo4eGhUNEk2UFkrSEgwMFdXc3dD?=
 =?utf-8?B?RDNVZmpkdGdUbXBSZWNWbnV4WDd6bnorazVUM01lMVUwWGRYNkxxbENsRzNZ?=
 =?utf-8?B?Y1dwV1RWczhSOEtGcjdVUm80cFlmRHhXRURYdW4ycGFScFFmUVpSRlRyVzMr?=
 =?utf-8?B?dExOMHh0YytaakQ2clRKT250dnI3a2REWkZBZmZuVDNTZndyUGNzaEVDMEdh?=
 =?utf-8?B?enZVcE5CVmZGNzc4TExtZllzTTUrTm9rR1VVS09QK2o2OWxTUVJZOFFGWDIz?=
 =?utf-8?B?UDJYdE9BM200cWpEQVlObFUvQndUbk54aGJKd2xpTDlBc3BvZmZOcXNWWmg0?=
 =?utf-8?B?dXhxV05qY3JDS0ozQWZ0N1BxTVpNR0lFNitFbVFhMDY5THZiQVBPSjhYaDRa?=
 =?utf-8?B?eG04VVJpb0sxN21MVzcwTThML1ZmYXJPMGlXWnhrWUpPeFloUG5lVUU5RlRi?=
 =?utf-8?B?SlJqR0tiSmFjdTBVSnlOMyt4TGhIZmlBa2ZCeC9HbHYwOXhvT3VDdlRHUi9B?=
 =?utf-8?Q?yKcdaKdRqlQy8pdu6mDNUqlcX?=
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On 21/05/2024 11:22 am, Sean Christopherson wrote:
> On Tue, May 21, 2024, Kai Huang wrote:
>> On 18/05/2024 12:04 pm, Sean Christopherson wrote:
>>> Point vmcs02.VE_INFORMATION_ADDRESS at the vCPU's #VE info page when
>>> initializing vmcs02, otherwise KVM will run L2 with EPT Violation #VE
>>> enabled and a VE info address pointing at pfn 0.
>>
>> How about we just clear EPT_VIOLATION_VE bit in 2nd_exec_control
>> unconditionally for vmcs02?
> 
> Because then KVM wouldn't get any EPT Violation #VE coverage for L2, and as
> evidence by the KVM-Unit-Test failure, running L2 with EPT Violation #VEs enabled
> provides unique coverage.  Doing so definitely provides coverage beyond what is
> strictly needed for TDX, but it's just as easy to set the VE info page in vmcs02
> as it is so clear EPT_VIOLATION_VE, so why not.
> 
>> Your next patch says:
>>
>> "
>> Always handle #VEs, e.g. due to prove EPT Violation #VE failures, in L0,
>> as KVM does not expose any #VE capabilities to L1, i.e. any and all #VEs
>> are KVM's responsibility.
>> "
> 
> I don't see how that's relevant to whether or not KVM enables EPT Violation #VEs
> while L2 is running.  That patch simply routes all #VEs to L0, it doesn't affect
> whether or not it's safe to enable EPT Violation #VEs for L2.

My logic is, if #VE exit cannot possibly happen for L2, then we don't 
need to deal whether to route #VE exits to L1. :-)

Well, actually I think conceptually, it kinda makes sense to route #VE 
exits to L1:

L1 should never enable #VE related bits so L1 is certainly not expecting 
to see #VE from L2.  But how to act should be depending on L1's logic? 
E.g., it can choose to ignore, or just kill the L2 etc?

Unconditionally disable #VE in vmcs02 can avoid such issue because it's 
just not possible for L2 to have the #VE exit.