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From: Larry Chiu <larry.chiu@realtek.com>
To: Justin Lai <justinlai0215@realtek.com>, Andrew Lunn <andrew@lunn.ch>
CC: "kuba@kernel.org" <kuba@kernel.org>,
        "davem@davemloft.net"
	<davem@davemloft.net>,
        "edumazet@google.com" <edumazet@google.com>,
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        "linux-kernel@vger.kernel.org"
	<linux-kernel@vger.kernel.org>,
        "netdev@vger.kernel.org"
	<netdev@vger.kernel.org>,
        "jiri@resnulli.us" <jiri@resnulli.us>,
        "horms@kernel.org" <horms@kernel.org>,
        Ping-Ke Shih <pkshih@realtek.com>
Subject: RE: [PATCH net-next v19 01/13] rtase: Add pci table supported in this module
Thread-Topic: [PATCH net-next v19 01/13] rtase: Add pci table supported in
 this module
Thread-Index: AQHaqC9Rjgvgl8xidUGsWwGzPtgZ5LGa66SAgAZDQWCAAA0PoA==
Date: Tue, 21 May 2024 06:20:04 +0000
Message-ID: <e5d7a77511f746bdb0b38b6174ef5de4@realtek.com>
References: <20240517075302.7653-1-justinlai0215@realtek.com>
 <20240517075302.7653-2-justinlai0215@realtek.com>
 <d840e007-c819-42df-bc71-536328d4f5d7@lunn.ch> 
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>> + *  Below is a simplified block diagram of the chip and its relevant in=
terfaces.
>> + *
>> + *               *************************
>> + *               *                       *
>> + *               *  CPU network device   *
>> + *               *                       *
>> + *               *   +-------------+     *
>> + *               *   |  PCIE Host  |     *
>> + *               ***********++************
>> + *                          ||
>> + *                         PCIE
>> + *                          ||
>> + *      ********************++**********************
>> + *      *            | PCIE Endpoint |             *
>> + *      *            +---------------+             *
>> + *      *                | GMAC |                  *
>> + *      *                +--++--+  Realtek         *
>> + *      *                   ||     RTL90xx Series  *
>> + *      *                   ||                     *
>> + *      *     +-------------++----------------+    *
>> + *      *     |           | MAC |             |    *
>> + *      *     |           +-----+             |    *
>> + *      *     |                               |    *
>> + *      *     |     Ethernet Switch Core      |    *
>> + *      *     |                               |    *
>> + *      *     |   +-----+           +-----+   |    *
>> + *      *     |   | MAC |...........| MAC |   |    *
>> + *      *     +---+-----+-----------+-----+---+    *
>> + *      *         | PHY |...........| PHY |        *
>> + *      *         +--++-+           +--++-+        *
>> + *      *************||****************||***********
>> + *
>> + *  The block of the Realtek RTL90xx series is our entire chip=20
>> + architecture,
>> + *  the GMAC is connected to the switch core, and there is no PHY in be=
tween.
>
>Given this architecture, this driver cannot be used unless there is a swit=
ch driver as well. This driver is nearly ready to be merged. So what are yo=
ur plans for the switch driver? Do you have a first version you can post? T=
hat will reassure us you do plan to release a switch driver, and not use a =
SDK in userspace.
>
>        Andrew

Hi Andrew,
This GMAC is configured after the switch is boot-up and does not require a =
switch driver to work.