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Message-ID: <4d226c3a3662374dca766b2a8f9f3479a63ddc39.camel@gmail.com>
Subject: Re: [PATCH 1/2] dt-bindings: iio: dac: add docs for ad8460
From: Nuno =?ISO-8859-1?Q?S=E1?= <noname.nuno@gmail.com>
To: David Lechner <dlechner@baylibre.com>, Jonathan Cameron
 <jic23@kernel.org>
Cc: Mariel Tinaco <Mariel.Tinaco@analog.com>, linux-iio@vger.kernel.org, 
 devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Lars-Peter
 Clausen <lars@metafoo.de>, Rob Herring <robh@kernel.org>, Krzysztof
 Kozlowski <krzk+dt@kernel.org>, Conor Dooley <conor+dt@kernel.org>, Liam
 Girdwood <lgirdwood@gmail.com>, Mark Brown <broonie@kernel.org>, Michael
 Hennerich <Michael.Hennerich@analog.com>, Marcelo Schmitt
 <marcelo.schmitt1@gmail.com>,  Dimitri Fedrau <dima.fedrau@gmail.com>,
 Guenter Roeck <linux@roeck-us.net>
Date: Tue, 21 May 2024 09:07:14 +0200
In-Reply-To: <CAMknhBE9mJUXsKYVwHb=6d3tVk9DiODWjqtzv9q+zSer5XqrqQ@mail.gmail.com>
References: <20240510064053.278257-1-Mariel.Tinaco@analog.com>
	 <20240510064053.278257-2-Mariel.Tinaco@analog.com>
	 <CAMknhBFXk07HbP_pPg5wkW-9Ah2-66kGzZFvcvBNrbjfguHb4g@mail.gmail.com>
	 <20240511172500.718fe12d@jic23-huawei>
	 <CAMknhBE9mJUXsKYVwHb=6d3tVk9DiODWjqtzv9q+zSer5XqrqQ@mail.gmail.com>
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On Sat, 2024-05-11 at 13:47 -0500, David Lechner wrote:
> On Sat, May 11, 2024 at 11:25=E2=80=AFAM Jonathan Cameron <jic23@kernel.o=
rg> wrote:
> >=20
> > On Fri, 10 May 2024 12:28:19 -0500
> > David Lechner <dlechner@baylibre.com> wrote:
> >=20
> > > On Fri, May 10, 2024 at 1:42=E2=80=AFAM Mariel Tinaco <Mariel.Tinaco@=
analog.com>
> > > wrote:
> > > >=20
> > > > This adds the bindings documentation for the 14-bit
> > > > High Voltage, High Current, Waveform Generator
> > > > Digital-to-Analog converter.
> > > >=20
> > > > Signed-off-by: Mariel Tinaco <Mariel.Tinaco@analog.com>
> > > > ---
> > > > =C2=A0.../bindings/iio/dac/adi,ad8460.yaml=C2=A0=C2=A0=C2=A0=C2=A0=
=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 | 67 +++++++++++++++++++
> > > > =C2=A0MAINTAINERS=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=
=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=
=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=
=C2=A0 |=C2=A0 7 ++
> > > > =C2=A02 files changed, 74 insertions(+)
> > > > =C2=A0create mode 100644
> > > > Documentation/devicetree/bindings/iio/dac/adi,ad8460.yaml
> > > >=20
> > > > diff --git a/Documentation/devicetree/bindings/iio/dac/adi,ad8460.y=
aml
> > > > b/Documentation/devicetree/bindings/iio/dac/adi,ad8460.yaml
> > > > new file mode 100644
> > > > index 000000000..924f76209
> > > > --- /dev/null
> > > > +++ b/Documentation/devicetree/bindings/iio/dac/adi,ad8460.yaml
> > > > @@ -0,0 +1,67 @@
> > > > +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
> > > > +# Copyright 2024 Analog Devices Inc.
> > > > +%YAML 1.2
> > > > +---
> > > > +$id: http://devicetree.org/schemas/iio/dac/adi,ad8460.yaml#
> > > > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > > > +
> > > > +title: Analog Devices AD8460 DAC
> > > > +
> > > > +maintainers:
> > > > +=C2=A0 - Mariel Tinaco <mariel.tinaco@analog.com>
> > > > +
> > > > +description: |
> > > > +=C2=A0 Analog Devices AD8460 110 V High Voltage, 1 A High Current,
> > > > +=C2=A0 Arbitrary Waveform Generator with Integrated 14-Bit High Sp=
eed DAC
> > > > +=C2=A0
> > > > https://www.analog.com/media/en/technical-documentation/data-sheets=
/ad8460.pdf
> > > > +
> > > > +properties:
> > > > +=C2=A0 compatible:
> > > > +=C2=A0=C2=A0=C2=A0 enum:
> > > > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 - adi,ad8460
> > > > +
> > > > +=C2=A0 reg:
> > > > +=C2=A0=C2=A0=C2=A0 maxItems: 1
> > > > +
> > > > +=C2=A0 spi-max-frequency:
> > > > +=C2=A0=C2=A0=C2=A0 maximum: 20000000
> > > > +
> > > > +=C2=A0 vref-supply:
> > >=20
> > > It would be nice to make the property name match the pin name since
> > > there is more than one reference voltage input.
> > >=20
> > > refio-1p2v-supply:
> > >=20
> > > > +=C2=A0=C2=A0=C2=A0 description: Drive voltage in the range of 1.2V=
 maximum to as low
> > > > as
> > > > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 low as 0.12V through the REF_IO pin=
 to adjust full scale output
> > > > span
> > >=20
> > > I don't seen anything in the datasheet named REF_IO. Is this a typo
> > > and it should be REFIO_1P2V?
> > >=20
> > > > +
> > > > +=C2=A0 clocks:
> > > > +=C2=A0=C2=A0=C2=A0 description: The clock for the DAC. This is the=
 sync clock
> > > > +
> > > > +=C2=A0 adi,rset-ohms:
> > > > +=C2=A0=C2=A0=C2=A0 description: Specify value of external resistor=
 connected to FS_ADJ
> > > > pin
> > > > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 to establish internal HVDAC's refer=
ence current I_REF
> > > > +=C2=A0=C2=A0=C2=A0 minimum: 2000
> > > > +=C2=A0=C2=A0=C2=A0 maximum: 20000
> > > > +
> > >=20
> > > I see lots more pins on the datasheet, many of which should be trivia=
l
> > > to add bindings for (we prefer to have the bindings as complete as
> > > possible even if the driver doesn't implement everything). Potential
> > > candidates:
> > >=20
> > > sdn-reset-gpios: (active high)
> > > reset-gpios: (active low)
> > > sdn-io-gpios: (active high)
> > >=20
> > > hvcc-supply:
> > > hvee-supply:
> > > vcc-5v-supply:
> > > vref-5v-supply:
> > > dvdd-3p3v-supply:
> > > avdd-3p3v-supply:
> > >=20
> > > It also looks like there is a parallel interface for data, so I would
> > > expect to see an io-backends property that links to the PHY used for
> > > handling that.
> > >=20
> > Ultimately yes, but the parallel interface might require some decisions=
 on
> > binding that are non obvious until it's actually implemented. So maybe
> > don't need that bit from the start.=C2=A0 The rest I agree should be he=
re.
> >=20
> >=20
>=20
> Since the driver patch uses a DMA channel that isn't documented here,
> I am assuming that the parallel interface is being used so we do need
> to consider it now. :-)

AFAIU, the way this is designed, the parallel interface is directly connect=
ed to
the DMA IP controller. So, at this point there's really no use for the DAC
backend. We may have different designs in the future but no use case for no=
w.

- Nuno S=C3=A1