Received: by 2002:ab2:6816:0:b0:1f9:5764:f03e with SMTP id t22csp2932538lqo; Tue, 21 May 2024 01:21:43 -0700 (PDT) X-Forwarded-Encrypted: i=3; AJvYcCVQhi21/5wRBbl4soz8QADs5N5DkjTIbdFpW7iq+h39NTh5nn4wimXlrWAwT94MbyYaXWcga7ud7OvHNRB7XLTuIcZ4SbHxJCdxQb8JCQ== X-Google-Smtp-Source: AGHT+IHde8xnq67asos7RWT5SK6k6rUVnRVcMS2XdrsRwijbSTfs/9AQjaSZRqcjcNVPl+XuTJjP X-Received: by 2002:a05:622a:5d1:b0:43e:39a3:74f8 with SMTP id d75a77b69052e-43e39a37747mr183640651cf.9.1716279703623; Tue, 21 May 2024 01:21:43 -0700 (PDT) ARC-Seal: i=2; a=rsa-sha256; t=1716279703; cv=pass; d=google.com; s=arc-20160816; b=RX9SFL2JL2nhGIM9TSUFOFDr0Y3crc9MLj4sYHNWND8qQR+HFsubEjmBtoR2fxvfbW 16/ymy+nVbSgvvr4YznY8I1KdbA2NHX1GpkKa3YIB+wr+CkRAt6mzrTWp9cYwcEEP3kq CwgvNdYXpshaV1yHdvt0ORyHvNd9EOgbcgDvxs7fNq9XpjFdEwb016aFeOW0UxlxuUMy WzITaNtu54LcoR77HCpj0d5KTnYN7rHU7QkX6HsPBekNJKMl1nWcJ9ISZ4YysQNqP0Cg r+3FZnLOBD4aYbfz+LPHE9R8de77znZp3qzx/ftWLSxF6cJJaOlwNhdjhqr/Q+xlsxwV Eizg== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=content-transfer-encoding:precedence:robot-unsubscribe:robot-id :message-id:mime-version:list-unsubscribe:list-subscribe:list-id :precedence:references:in-reply-to:cc:subject:to:reply-to:sender :from:dkim-signature:dkim-signature:date; bh=JqGa1COheHGNBGh5TZ+qFIrrxvZKLlcTiRfbU4RvjQA=; fh=LFzeYgb0ex3z8fytjE8glOGl8UR5Le6kyQY6lwbIcLs=; b=IF1yfrpWLjCB/njmfhbCm2q/dbQvLZbRsosoVxyz8nJ8+5MOTaa10L/VR5LoR33Xos KQf9reuR6KXrTwIi2x0WeOf3ydUEZIS9qXyKFEap1MWL4w7hHc4uCkMDdAJRd85Jxe/x QrU6hs2zQ37sRKpMZ67zETLf056excAuciXWrb/QDbnJAwG4hVtNz7D9AyDbK3UbejRM 1Ba5Qv3s3ACwiJ+cSvKK1bhPF3r8bcvZYjQnXdaRC7tDAHqhqfLYxRXkV8saG3nrU6lZ 4HgGIa+eugKp2315GQxnNQZ7ujF84BF8t4tB9zDrVGHlCJWOD7osdHqpssDepHs4GPmF Xivw==; dara=google.com ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b="RqFt/s8n"; dkim=neutral (no key) header.i=@linutronix.de header.s=2020e; arc=pass (i=1 spf=pass spfdomain=linutronix.de dkim=pass dkdomain=linutronix.de dmarc=pass fromdomain=linutronix.de); spf=pass (google.com: domain of linux-kernel+bounces-184632-linux.lists.archive=gmail.com@vger.kernel.org designates 2604:1380:45d1:ec00::1 as permitted sender) smtp.mailfrom="linux-kernel+bounces-184632-linux.lists.archive=gmail.com@vger.kernel.org"; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de Return-Path: Received: from ny.mirrors.kernel.org (ny.mirrors.kernel.org. [2604:1380:45d1:ec00::1]) by mx.google.com with ESMTPS id d75a77b69052e-43e2cc0c102si24775261cf.228.2024.05.21.01.21.43 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 21 May 2024 01:21:43 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel+bounces-184632-linux.lists.archive=gmail.com@vger.kernel.org designates 2604:1380:45d1:ec00::1 as permitted sender) client-ip=2604:1380:45d1:ec00::1; Authentication-Results: mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b="RqFt/s8n"; dkim=neutral (no key) header.i=@linutronix.de header.s=2020e; arc=pass (i=1 spf=pass spfdomain=linutronix.de dkim=pass dkdomain=linutronix.de dmarc=pass fromdomain=linutronix.de); spf=pass (google.com: domain of linux-kernel+bounces-184632-linux.lists.archive=gmail.com@vger.kernel.org designates 2604:1380:45d1:ec00::1 as permitted sender) smtp.mailfrom="linux-kernel+bounces-184632-linux.lists.archive=gmail.com@vger.kernel.org"; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de Received: from smtp.subspace.kernel.org (wormhole.subspace.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ny.mirrors.kernel.org (Postfix) with ESMTPS id 4B6C11C20A55 for ; Tue, 21 May 2024 08:21:43 +0000 (UTC) Received: from localhost.localdomain (localhost.localdomain [127.0.0.1]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 56F3855E48; Tue, 21 May 2024 08:21:32 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="RqFt/s8n"; dkim=permerror (0-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="jvFuB72T" Received: from galois.linutronix.de (Galois.linutronix.de [193.142.43.55]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id BBDB551C4F; Tue, 21 May 2024 08:21:29 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=193.142.43.55 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716279691; cv=none; b=hLKrYyKaCveLwswFdSUN2uCOXQUGqhe+nyOiYZIbLMKoj94a2X7LnZUTtSfpaOLfdXi82KyGR4/r0vMPLqhnWsoVsNH4XybP6AGMQxbCuqp4zeZ09cf6Cz/3rdu4JY0ePF8rNV1FYQvZhQmdlA5v4nI2IfcBzrWhKgrePOfRQvg= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716279691; c=relaxed/simple; bh=TPNf0DN9ZUALd+1/r4ahQlBuhwHVsSYRR+3/ur3Jz9U=; h=Date:From:To:Subject:Cc:In-Reply-To:References:MIME-Version: Message-ID:Content-Type; b=hKJiNBkBc0vS3HGFNNSUjPnKavD/IFlPC0hfJkIFcY4aDwIZIpAmOlA7z6YpvsLu5R5nWN6VcP32GBZf2tkT0xEwAONMmcCcBoBhrdf6hhmlmYwMYmbXXE4eshwG7mYFpcy3tpwsGY0+qC/qTmLQ9kMvNCBlrLgnTMTmK5/VwwM= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linutronix.de; spf=pass smtp.mailfrom=linutronix.de; dkim=pass (2048-bit key) header.d=linutronix.de header.i=@linutronix.de header.b=RqFt/s8n; dkim=permerror (0-bit key) header.d=linutronix.de header.i=@linutronix.de header.b=jvFuB72T; arc=none smtp.client-ip=193.142.43.55 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linutronix.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linutronix.de Date: Tue, 21 May 2024 08:21:26 -0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1716279687; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=JqGa1COheHGNBGh5TZ+qFIrrxvZKLlcTiRfbU4RvjQA=; b=RqFt/s8nvcHTGmCNNx6GOfa/r2DVlSgS2Q8c2sydrLswj5DucfLkUJMwfXuzVr7x1vs9e0 H9ikQHuqsx8vlYCjw/AEQvaNKQwHjV0IKrT71RkKxRIZfPk1wFe9Z3qCaj62K53+fjHPWU UU7nEGQeA1xWIPODOeWUDOm5/kO2S72RKnVcTsSD+EW9dxyK5aCS0dEHYIMMul8zJYemca EpTLEImhPmRE6sy7nfyC1JZTqgC92mq4flmzvDCUT0NRIxy/NhYHz9mq34DNS23a+fSxte YAIU5bf/N4cP4JpZ6AV4R4m9d/2bW21lzwXKYoYccdOHyDqhSHe8/SMxa+osGA== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1716279687; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=JqGa1COheHGNBGh5TZ+qFIrrxvZKLlcTiRfbU4RvjQA=; b=jvFuB72TAfPUSshNPIPmTP4uQnoM3sYmUkKERYWt7Vo8GhTqkFFr3x6yDmcQgcXGL5O4Ul CZ/7DbhJGhD2K9Dw== From: "tip-bot2 for Uros Bizjak" Sender: tip-bot2@linutronix.de Reply-to: linux-kernel@vger.kernel.org To: linux-tip-commits@vger.kernel.org Subject: [tip: x86/percpu] x86/percpu: Move some percpu accessors around to reduce ifdeffery Cc: Uros Bizjak , Ingo Molnar , Andy Lutomirski , Josh Poimboeuf , Linus Torvalds , x86@kernel.org, linux-kernel@vger.kernel.org In-Reply-To: <20240520080951.121049-2-ubizjak@gmail.com> References: <20240520080951.121049-2-ubizjak@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-ID: <171627968673.10875.680212759397687471.tip-bot2@tip-bot2> Robot-ID: Robot-Unsubscribe: Contact to get blacklisted from these emails Precedence: bulk Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit The following commit has been merged into the x86/percpu branch of tip: Commit-ID: 47c9dbd2fb5f98453840e18ebced9138ec8b4cc5 Gitweb: https://git.kernel.org/tip/47c9dbd2fb5f98453840e18ebced9138ec8b4cc5 Author: Uros Bizjak AuthorDate: Mon, 20 May 2024 10:09:25 +02:00 Committer: Ingo Molnar CommitterDate: Mon, 20 May 2024 10:25:31 +02:00 x86/percpu: Move some percpu accessors around to reduce ifdeffery Move some percpu accessors around, mainly to reduce ifdeffery and improve readabilty by following dependencies between accessors. No functional change intended. Signed-off-by: Uros Bizjak Signed-off-by: Ingo Molnar Cc: Andy Lutomirski Cc: Josh Poimboeuf Cc: Linus Torvalds Link: https://lore.kernel.org/r/20240520080951.121049-2-ubizjak@gmail.com --- arch/x86/include/asm/percpu.h | 40 ++++++++++++++++------------------ 1 file changed, 19 insertions(+), 21 deletions(-) diff --git a/arch/x86/include/asm/percpu.h b/arch/x86/include/asm/percpu.h index 39762fc..0f0d897 100644 --- a/arch/x86/include/asm/percpu.h +++ b/arch/x86/include/asm/percpu.h @@ -445,17 +445,6 @@ do { \ #define this_cpu_try_cmpxchg128(pcp, ovalp, nval) percpu_try_cmpxchg128_op(16, volatile, pcp, ovalp, nval) #endif -/* - * this_cpu_read() makes gcc load the percpu variable every time it is - * accessed while this_cpu_read_stable() allows the value to be cached. - * this_cpu_read_stable() is more efficient and can be used if its value - * is guaranteed to be valid across cpus. The current users include - * pcpu_hot.current_task and pcpu_hot.top_of_stack, both of which are - * actually per-thread variables implemented as per-CPU variables and - * thus stable for the duration of the respective task. - */ -#define this_cpu_read_stable(pcp) __pcpu_size_call_return(this_cpu_read_stable_, pcp) - #define raw_cpu_read_1(pcp) __raw_cpu_read(1, , pcp) #define raw_cpu_read_2(pcp) __raw_cpu_read(2, , pcp) #define raw_cpu_read_4(pcp) __raw_cpu_read(4, , pcp) @@ -470,16 +459,6 @@ do { \ #define this_cpu_write_2(pcp, val) __raw_cpu_write(2, volatile, pcp, val) #define this_cpu_write_4(pcp, val) __raw_cpu_write(4, volatile, pcp, val) -#ifdef CONFIG_X86_64 -#define raw_cpu_read_8(pcp) __raw_cpu_read(8, , pcp) -#define raw_cpu_write_8(pcp, val) __raw_cpu_write(8, , pcp, val) - -#define this_cpu_read_8(pcp) __raw_cpu_read(8, volatile, pcp) -#define this_cpu_write_8(pcp, val) __raw_cpu_write(8, volatile, pcp, val) -#endif - -#define this_cpu_read_const(pcp) __raw_cpu_read_const(pcp) - #define this_cpu_read_stable_1(pcp) __raw_cpu_read_stable(1, pcp) #define this_cpu_read_stable_2(pcp) __raw_cpu_read_stable(2, pcp) #define this_cpu_read_stable_4(pcp) __raw_cpu_read_stable(4, pcp) @@ -535,6 +514,12 @@ do { \ * 32 bit must fall back to generic operations. */ #ifdef CONFIG_X86_64 +#define raw_cpu_read_8(pcp) __raw_cpu_read(8, , pcp) +#define raw_cpu_write_8(pcp, val) __raw_cpu_write(8, , pcp, val) + +#define this_cpu_read_8(pcp) __raw_cpu_read(8, volatile, pcp) +#define this_cpu_write_8(pcp, val) __raw_cpu_write(8, volatile, pcp, val) + #define this_cpu_read_stable_8(pcp) __raw_cpu_read_stable(8, pcp) #define raw_cpu_add_8(pcp, val) percpu_add_op(8, , (pcp), val) @@ -561,6 +546,19 @@ do { \ #define raw_cpu_read_long(pcp) raw_cpu_read_4(pcp) #endif +#define this_cpu_read_const(pcp) __raw_cpu_read_const(pcp) + +/* + * this_cpu_read() makes gcc load the percpu variable every time it is + * accessed while this_cpu_read_stable() allows the value to be cached. + * this_cpu_read_stable() is more efficient and can be used if its value + * is guaranteed to be valid across cpus. The current users include + * pcpu_hot.current_task and pcpu_hot.top_of_stack, both of which are + * actually per-thread variables implemented as per-CPU variables and + * thus stable for the duration of the respective task. + */ +#define this_cpu_read_stable(pcp) __pcpu_size_call_return(this_cpu_read_stable_, pcp) + #define x86_this_cpu_constant_test_bit(_nr, _var) \ ({ \ unsigned long __percpu *addr__ = \