Received: by 2002:ab2:6816:0:b0:1f9:5764:f03e with SMTP id t22csp3024912lqo; Tue, 21 May 2024 04:53:57 -0700 (PDT) X-Forwarded-Encrypted: i=3; AJvYcCWLUV3mdfOFKCc2yD3oecySp3FVafGS3yeRvQBxrYJOBsnZQHFbAbTgA9J4/xM2qWgcbiYvI0koG6FGCXxqyjYDFiENNt2mPeITWGBRSw== X-Google-Smtp-Source: AGHT+IE+yza165buSr5tdg5bWlpdcYAKf82kf0nDyvs1rZp5w6mSlKHHTkjLJkqvkWmpFqiOnaMi X-Received: by 2002:a05:6122:369c:b0:4da:9d3e:a7df with SMTP id 71dfb90a1353d-4df882c0793mr30221534e0c.5.1716292436905; Tue, 21 May 2024 04:53:56 -0700 (PDT) ARC-Seal: i=2; a=rsa-sha256; t=1716292436; cv=pass; d=google.com; s=arc-20160816; b=powfx46u2MmsAcvSXM2623O7IwM5ze62hRK4xhlsnYW7UKGYULtVBL2EjFvMOmEMoI MhEyG+J7gRlUWOTNq/OoaI2H4GD2hBwU6opjc+4PrCbrz/1SXte1QjIP0Z7/2FHTZVrx yIphNLNev54ZCAGWSpvY6RvUptE66rCTUMA/SDixvFI6WH7M/4ytLisnJdAXW9fSRQ/V DYKqzux1gw/nnLjHDM+nBA/ZL95otoZDI+mrc0FbrC1WIZOhoW0Aa0UX4FDqxuQLmzbw KE/GGv6cB+N9ef24EJLSFDZiFC6ezBPX3mJuR7oJHznqt0Fs3/16H8LucGVDzjL9CMoV F+0A== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=content-transfer-encoding:in-reply-to:autocrypt:content-language :from:references:cc:to:subject:user-agent:mime-version :list-unsubscribe:list-subscribe:list-id:precedence:date:message-id :dkim-signature; bh=h9EeQs2c5Zm4wW2fmWXGTBDVXu/JUndzxzXqqpLwmrc=; fh=Svxg33U9hRl868PCPp0NVoIF7EvdIQjhfFKh8AUBDvQ=; b=BwARLu5pv3LUM7nWIY1/hMI5UezJ7vKpQrVF3C0zDwoX99SiQo+jezRwC0Z2wX+LP2 MebTBMMLnvJa1rHi19bxN4D8KaPh9HE0vTzJxmF15H/H+krcLrzSnDE66IhaFZvTuWOX ApOAH2ih/jjTpjl/ve18ZbaA0pid4rddRKiLcbb0gcyLH9w0ch5l0xNmsfaGeemmPhfZ uCtsxl5N6xPx5dHp/t+IxNooc1K+xdvpvzllZLrtQYzQLVbE5QiVOoczro609LlM8dMN Dc0S6W3a6xzuZwmZp+T+vI7rtxIu2MqpSHOYSxvNVNc5vVez507MRd7PmkemefRgMA0t zq6w==; dara=google.com ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=HMMCdohG; arc=pass (i=1 dkim=pass dkdomain=kernel.org); spf=pass (google.com: domain of linux-kernel+bounces-184909-linux.lists.archive=gmail.com@vger.kernel.org designates 2604:1380:45d1:ec00::1 as permitted sender) smtp.mailfrom="linux-kernel+bounces-184909-linux.lists.archive=gmail.com@vger.kernel.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Return-Path: Received: from ny.mirrors.kernel.org (ny.mirrors.kernel.org. [2604:1380:45d1:ec00::1]) by mx.google.com with ESMTPS id af79cd13be357-792bf277332si2660687085a.23.2024.05.21.04.53.56 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 21 May 2024 04:53:56 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel+bounces-184909-linux.lists.archive=gmail.com@vger.kernel.org designates 2604:1380:45d1:ec00::1 as permitted sender) client-ip=2604:1380:45d1:ec00::1; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=HMMCdohG; arc=pass (i=1 dkim=pass dkdomain=kernel.org); spf=pass (google.com: domain of linux-kernel+bounces-184909-linux.lists.archive=gmail.com@vger.kernel.org designates 2604:1380:45d1:ec00::1 as permitted sender) smtp.mailfrom="linux-kernel+bounces-184909-linux.lists.archive=gmail.com@vger.kernel.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: from smtp.subspace.kernel.org (wormhole.subspace.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ny.mirrors.kernel.org (Postfix) with ESMTPS id 9C4CB1C221D6 for ; Tue, 21 May 2024 11:53:56 +0000 (UTC) Received: from localhost.localdomain (localhost.localdomain [127.0.0.1]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 0A89A75811; Tue, 21 May 2024 11:53:50 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="HMMCdohG" Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1532574BE0; Tue, 21 May 2024 11:53:48 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716292429; cv=none; b=hLYIvkV/v61PyQyEpN4J+y8XLafpCFvsB+MIAtVk6OEkuMPbXznLmARkliLyg3mKpU1+xwblWqGqoYyL0J79Y+dtHikK/GnDKdCQ3rC9oUrDQnksPZoi+zvRYZXvjmQm3DJJY6Riz1uccecCdXSfHuJBYL3T8JZ+BSMIvC64eVM= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716292429; c=relaxed/simple; bh=3INiKcSL+1K2Iku85292QdKjcuGzCvYSiIlIYnnh/qs=; h=Message-ID:Date:MIME-Version:Subject:To:Cc:References:From: In-Reply-To:Content-Type; b=OeBWhGN68aYh98RAOVkhHgiJUOtEnuDYZvNfh+QyWiFbv/1Sjd/dOK3PjTyPYR5dJCXiPRqiSits9/9OGNO1DAqcdIQF+fhBdRT59wp+Bq/ESLaXB+C3GWQxQZm5BRvtNEfaMhyyQs9B8YseDj6kcvDZGa5BuOwX+K23xow7wmo= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=HMMCdohG; arc=none smtp.client-ip=10.30.226.201 Received: by smtp.kernel.org (Postfix) with ESMTPSA id C3F17C2BD11; Tue, 21 May 2024 11:53:44 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1716292428; bh=3INiKcSL+1K2Iku85292QdKjcuGzCvYSiIlIYnnh/qs=; h=Date:Subject:To:Cc:References:From:In-Reply-To:From; b=HMMCdohGqmi8SCSlfYGK1goJW5CLWZXrysFz3ZHw/KgWl+zA+Reehv3djCGJwfpbg As+BQF4H3sk5B8e6016ZQAZskidE1LQjXOM8iLMzOp4vJxrVGXv8pbWbZi9q6OHm18 9oHkEjjCzKN/CspOhlqnbIO3m99nIC98u47YtwdG8z8zOtnDDZFbtPPexGgpt3dne6 KNR5ZiylLm2vM/mniLe2MSD1OB85dXmVNP48Cl/l61AFeIS0yVTjtho81FtKYsVVvd bAEZgQC91uRYbkAYywyoA0QcwEq894MjwltHTzsTBk2sI+VRno7H07CPtHrZAbLbZi LhcH0yxaSDO8Q== Message-ID: <80b6e6e6-9805-4a85-97d5-38e1b2bf2dd0@kernel.org> Date: Tue, 21 May 2024 13:53:42 +0200 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [RESEND PATCH 1/2] dt-bindings: dma: Add reg-names to nvidia,tegra210-adma To: Sameer Pujar , vkoul@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, thierry.reding@gmail.com, jonathanh@nvidia.com, dmaengine@vger.kernel.org, devicetree@vger.kernel.org Cc: linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org, ldewangan@nvidia.com, mkumard@nvidia.com References: <20240521110801.1692582-1-spujar@nvidia.com> <20240521110801.1692582-2-spujar@nvidia.com> From: Krzysztof Kozlowski Content-Language: en-US Autocrypt: addr=krzk@kernel.org; keydata= xsFNBFVDQq4BEAC6KeLOfFsAvFMBsrCrJ2bCalhPv5+KQF2PS2+iwZI8BpRZoV+Bd5kWvN79 cFgcqTTuNHjAvxtUG8pQgGTHAObYs6xeYJtjUH0ZX6ndJ33FJYf5V3yXqqjcZ30FgHzJCFUu JMp7PSyMPzpUXfU12yfcRYVEMQrmplNZssmYhiTeVicuOOypWugZKVLGNm0IweVCaZ/DJDIH gNbpvVwjcKYrx85m9cBVEBUGaQP6AT7qlVCkrf50v8bofSIyVa2xmubbAwwFA1oxoOusjPIE J3iadrwpFvsZjF5uHAKS+7wHLoW9hVzOnLbX6ajk5Hf8Pb1m+VH/E8bPBNNYKkfTtypTDUCj NYcd27tjnXfG+SDs/EXNUAIRefCyvaRG7oRYF3Ec+2RgQDRnmmjCjoQNbFrJvJkFHlPeHaeS BosGY+XWKydnmsfY7SSnjAzLUGAFhLd/XDVpb1Een2XucPpKvt9ORF+48gy12FA5GduRLhQU vK4tU7ojoem/G23PcowM1CwPurC8sAVsQb9KmwTGh7rVz3ks3w/zfGBy3+WmLg++C2Wct6nM Pd8/6CBVjEWqD06/RjI2AnjIq5fSEH/BIfXXfC68nMp9BZoy3So4ZsbOlBmtAPvMYX6U8VwD TNeBxJu5Ex0Izf1NV9CzC3nNaFUYOY8KfN01X5SExAoVTr09ewARAQABzSVLcnp5c3p0b2Yg S296bG93c2tpIDxrcnprQGtlcm5lbC5vcmc+wsGVBBMBCgA/AhsDBgsJCAcDAgYVCAIJCgsE FgIDAQIeAQIXgBYhBJvQfg4MUfjVlne3VBuTQ307QWKbBQJgPO8PBQkUX63hAAoJEBuTQ307 QWKbBn8P+QFxwl7pDsAKR1InemMAmuykCHl+XgC0LDqrsWhAH5TYeTVXGSyDsuZjHvj+FRP+ gZaEIYSw2Yf0e91U9HXo3RYhEwSmxUQ4Fjhc9qAwGKVPQf6YuQ5yy6pzI8brcKmHHOGrB3tP /MODPt81M1zpograAC2WTDzkICfHKj8LpXp45PylD99J9q0Y+gb04CG5/wXs+1hJy/dz0tYy iua4nCuSRbxnSHKBS5vvjosWWjWQXsRKd+zzXp6kfRHHpzJkhRwF6ArXi4XnQ+REnoTfM5Fk VmVmSQ3yFKKePEzoIriT1b2sXO0g5QXOAvFqB65LZjXG9jGJoVG6ZJrUV1MVK8vamKoVbUEe 0NlLl/tX96HLowHHoKhxEsbFzGzKiFLh7hyboTpy2whdonkDxpnv/H8wE9M3VW/fPgnL2nPe xaBLqyHxy9hA9JrZvxg3IQ61x7rtBWBUQPmEaK0azW+l3ysiNpBhISkZrsW3ZUdknWu87nh6 eTB7mR7xBcVxnomxWwJI4B0wuMwCPdgbV6YDUKCuSgRMUEiVry10xd9KLypR9Vfyn1AhROrq AubRPVeJBf9zR5UW1trJNfwVt3XmbHX50HCcHdEdCKiT9O+FiEcahIaWh9lihvO0ci0TtVGZ MCEtaCE80Q3Ma9RdHYB3uVF930jwquplFLNF+IBCn5JRzsFNBFVDXDQBEADNkrQYSREUL4D3 Gws46JEoZ9HEQOKtkrwjrzlw/tCmqVzERRPvz2Xg8n7+HRCrgqnodIYoUh5WsU84N03KlLue MNsWLJBvBaubYN4JuJIdRr4dS4oyF1/fQAQPHh8Thpiz0SAZFx6iWKB7Qrz3OrGCjTPcW6ei OMheesVS5hxietSmlin+SilmIAPZHx7n242u6kdHOh+/SyLImKn/dh9RzatVpUKbv34eP1wA GldWsRxbf3WP9pFNObSzI/Bo3kA89Xx2rO2roC+Gq4LeHvo7ptzcLcrqaHUAcZ3CgFG88CnA 6z6lBZn0WyewEcPOPdcUB2Q7D/NiUY+HDiV99rAYPJztjeTrBSTnHeSBPb+qn5ZZGQwIdUW9 YegxWKvXXHTwB5eMzo/RB6vffwqcnHDoe0q7VgzRRZJwpi6aMIXLfeWZ5Wrwaw2zldFuO4Dt 91pFzBSOIpeMtfgb/Pfe/a1WJ/GgaIRIBE+NUqckM+3zJHGmVPqJP/h2Iwv6nw8U+7Yyl6gU BLHFTg2hYnLFJI4Xjg+AX1hHFVKmvl3VBHIsBv0oDcsQWXqY+NaFahT0lRPjYtrTa1v3tem/ JoFzZ4B0p27K+qQCF2R96hVvuEyjzBmdq2esyE6zIqftdo4MOJho8uctOiWbwNNq2U9pPWmu 4vXVFBYIGmpyNPYzRm0QPwARAQABwsF8BBgBCgAmAhsMFiEEm9B+DgxR+NWWd7dUG5NDfTtB YpsFAmA872oFCRRflLYACgkQG5NDfTtBYpvScw/9GrqBrVLuJoJ52qBBKUBDo4E+5fU1bjt0 Gv0nh/hNJuecuRY6aemU6HOPNc2t8QHMSvwbSF+Vp9ZkOvrM36yUOufctoqON+wXrliEY0J4 ksR89ZILRRAold9Mh0YDqEJc1HmuxYLJ7lnbLYH1oui8bLbMBM8S2Uo9RKqV2GROLi44enVt vdrDvo+CxKj2K+d4cleCNiz5qbTxPUW/cgkwG0lJc4I4sso7l4XMDKn95c7JtNsuzqKvhEVS oic5by3fbUnuI0cemeizF4QdtX2uQxrP7RwHFBd+YUia7zCcz0//rv6FZmAxWZGy5arNl6Vm lQqNo7/Poh8WWfRS+xegBxc6hBXahpyUKphAKYkah+m+I0QToCfnGKnPqyYIMDEHCS/RfqA5 t8F+O56+oyLBAeWX7XcmyM6TGeVfb+OZVMJnZzK0s2VYAuI0Rl87FBFYgULdgqKV7R7WHzwD uZwJCLykjad45hsWcOGk3OcaAGQS6NDlfhM6O9aYNwGL6tGt/6BkRikNOs7VDEa4/HlbaSJo 7FgndGw1kWmkeL6oQh7wBvYll2buKod4qYntmNKEicoHGU+x91Gcan8mCoqhJkbqrL7+nXG2 5Q/GS5M9RFWS+nYyJh+c3OcfKqVcZQNANItt7+ULzdNJuhvTRRdC3g9hmCEuNSr+CLMdnRBY fv0= In-Reply-To: <20240521110801.1692582-2-spujar@nvidia.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 21/05/2024 13:08, Sameer Pujar wrote: > From: Mohan Kumar > > For Non-Hypervisor mode, Tegra ADMA driver requires the register > resource range to include both global and channel page in the reg > entry. For Hypervisor more, Tegra ADMA driver requires only the > channel page and global page range is not allowed for access. > > Add reg-names DT binding for Hypervisor mode to help driver to > differentiate the config between Hypervisor and Non-Hypervisor > mode of execution. > > Signed-off-by: Mohan Kumar > Signed-off-by: Sameer Pujar > --- > .../devicetree/bindings/dma/nvidia,tegra210-adma.yaml | 10 ++++++++++ > 1 file changed, 10 insertions(+) > > diff --git a/Documentation/devicetree/bindings/dma/nvidia,tegra210-adma.yaml b/Documentation/devicetree/bindings/dma/nvidia,tegra210-adma.yaml > index 877147e95ecc..ede47f4a3eec 100644 > --- a/Documentation/devicetree/bindings/dma/nvidia,tegra210-adma.yaml > +++ b/Documentation/devicetree/bindings/dma/nvidia,tegra210-adma.yaml > @@ -29,8 +29,18 @@ properties: > - const: nvidia,tegra186-adma > > reg: > + description: | > + For hypervisor mode, the address range should include a > + ADMA channel page address range, for non-hypervisor mode > + it starts with ADMA base address covering Global and Channel > + page address range. > maxItems: 1 > > + reg-names: > + description: only required for Hypervisor mode. This does not work like that. I provide vm entry for non-hypervisor mode and what? You claim it is virtualized? Drop property. Best regards, Krzysztof