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[90.5.97.161]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-41ff5e3dcfbsm428288055e9.22.2024.05.21.07.41.31 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 21 May 2024 07:41:32 -0700 (PDT) Message-ID: <8078d106-0173-4f04-aab7-4b2726b0bb3a@baylibre.com> Date: Tue, 21 May 2024 16:41:30 +0200 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v4 4/4] arm64: dts: mediatek: mt8188: add default thermal zones To: AngeloGioacchino Del Regno , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Matthias Brugger , Daniel Lezcano , Nicolas Pitre Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org References: <20240521-mtk-thermal-mt818x-dtsi-v4-0-b91ee678411c@baylibre.com> <20240521-mtk-thermal-mt818x-dtsi-v4-4-b91ee678411c@baylibre.com> Content-Language: en-US From: Julien Panis In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit On 5/21/24 16:19, AngeloGioacchino Del Regno wrote: > Il 21/05/24 16:05, Julien Panis ha scritto: >> From: Nicolas Pitre >> >> Inspired by the vendor kernel but adapted to the upstream thermal >> driver version. >> >> Signed-off-by: Nicolas Pitre >> Signed-off-by: Julien Panis >> --- >>   arch/arm64/boot/dts/mediatek/mt8188.dtsi | 432 +++++++++++++++++++++++++++++++ >>   1 file changed, 432 insertions(+) >> >> diff --git a/arch/arm64/boot/dts/mediatek/mt8188.dtsi b/arch/arm64/boot/dts/mediatek/mt8188.dtsi >> index a9f1b9db54a6..2b0f3e03acc1 100644 >> --- a/arch/arm64/boot/dts/mediatek/mt8188.dtsi >> +++ b/arch/arm64/boot/dts/mediatek/mt8188.dtsi >> @@ -12,6 +12,8 @@ >>   #include >>   #include >>   #include >> +#include >> +#include >>     / { >>       compatible = "mediatek,mt8188"; > > ..snip.. > >> + >> +        gpu1-thermal { > > You forgot to implement my feedback to Nicolas - this must be gpu-thermal Sorry, I did not forget. I just did not understand correctly. Even after looking at mt8195, I thought that only the '_' in 'cpu_big0-thermal' and 'cpu_big1-thermal' were wrong in v3. Thanks for making it clear. > >> +            polling-delay = <1000>; >> +            polling-delay-passive = <250>; >> +            thermal-sensors = <&lvts_ap MT8188_AP_GPU1>; >> + >> +            trips { >> +                gpu1_alert0: trip-alert0 { >> +                    temperature = <85000>; >> +                    hysteresis = <2000>; >> +                    type = "passive"; >> +                }; >> + >> +                gpu1_alert1: trip-alert1 { >> +                    temperature = <95000>; >> +                    hysteresis = <2000>; >> +                    type = "hot"; >> +                }; >> + >> +                gpu1_crit: trip-crit { >> +                    temperature = <100000>; >> +                    hysteresis = <0>; >> +                    type = "critical"; >> +                }; >> +            }; >> +        }; >> + >> +        gpu2-thermal { > > ...and for consistency with the other SoCs, this must be gpu1-thermal. Now I think I get it, thank you. > >> +            polling-delay = <1000>; >> +            polling-delay-passive = <250>; >> +            thermal-sensors = <&lvts_ap MT8188_AP_GPU2>; >> + >> +            trips { >> +                gpu2_alert0: trip-alert0 { >> +                    temperature = <85000>; >> +                    hysteresis = <2000>; >> +                    type = "passive"; >> +                }; >> + >> +                gpu2_alert1: trip-alert1 { >> +                    temperature = <95000>; >> +                    hysteresis = <2000>; >> +                    type = "hot"; >> +                }; >> + >> +                gpu2_crit: trip-crit { >> +                    temperature = <100000>; >> +                    hysteresis = <0>; >> +                    type = "critical"; >> +                }; >> +            }; >> +        }; >> + >> +        soc1-thermal { > > Any idea of what can "soc1" ever be? What measurement point is that? > > VPU? IMG? INFRA? > > soc1, soc2, soc3 make little sense. No idea to be honest. I'll try to find out that information and will change that in v5. Julien