Received: by 2002:ab2:6816:0:b0:1f9:5764:f03e with SMTP id t22csp3242725lqo; Tue, 21 May 2024 10:41:04 -0700 (PDT) X-Forwarded-Encrypted: i=3; AJvYcCUoynBRk7By2MDLjcIQvYl1Np5laxziZdK9kuZtfX1k2/nVmSzYCeLojhgaw+udSd6uDl8r+g8AVtl/Ja84UHDGrvH3hn4h+MRpcRZhCg== X-Google-Smtp-Source: AGHT+IHlRM0IBtCRmQfonTjnq1IvbqLoJbiiKltofU3x810E/bKUWH6Ftlev3CCVr5HvhQVqCqtH X-Received: by 2002:a05:6a21:998d:b0:1b1:d823:3ea2 with SMTP id adf61e73a8af0-1b1d8233f35mr8385023637.12.1716313264398; Tue, 21 May 2024 10:41:04 -0700 (PDT) ARC-Seal: i=2; a=rsa-sha256; t=1716313264; cv=pass; d=google.com; s=arc-20160816; b=mgFO/TSNK1iHWwP1n8BtZuSLN+remR5f1ahEqrEFqDkCa7PqZVZqIHIbo8B+ZGzm2p o1gotb5YsCKgZt4GmHPHzcFHA2oTijcl66SDVKpzV/CErxPZpyOkppSkfHcSIUkcvZz+ /tvjWWJl6FCXNh+D2z9iu6RTGuh3RzGxq9N7QTQauCdx/R1EcC7d3XsO8Dj/Ob0efVO6 Z0aFySpPXBmAiuCh8K+B8Au8C8p8yO8g4BL5SLBbtC3Mg+4pA3NS6bv7n6pMEzjaAuaV JwOcTpnexhE2h/Ckswy5gEIEqmryl9azY5JGnZA89BOyTYgC/ycjIKgmoafv1kKfCvsf rW0w== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=content-transfer-encoding:mime-version:list-unsubscribe :list-subscribe:list-id:precedence:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=/LlBTRs42DFlFt0tRsgJH5GwY1PUP/iyGblV8/8MI+o=; fh=7D8bWqELNqJM6KF7zbibUOya8038rGAdDMFXsJMRu8c=; b=J0rh7BJc4xHgwvx4Mtn1W54/9hPcxut8OngCfwZleRIEY0sdwLbOKqRDY0NkmvKzcO qicG8pow93FLMO88kz77MVtqC5fEXldYabLEygh36bYPiw0Uiq8hr6atXScNyi46iisf fdHexE0GjxEbSmwtV2xI/sZMfNIw4KflKKVRfdk3Tl+6ZsKKmpGOGXYhi+0dZ7tqiDvv PZ+lJ3zNEyTDHHCrPD22jfSYpBrFc3axCe+k3CrxnSYx4JfoA4QRU89GFmFm9+4aaXFk O/xLXvmjTpVdZCffbb2wWrFXXFySyTut5tZ6opiWDIroCKFO+e0pcCu5vB4wYm27uKo+ iVlQ==; dara=google.com ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=cSVRICcZ; arc=pass (i=1 spf=pass spfdomain=intel.com dkim=pass dkdomain=intel.com dmarc=pass fromdomain=intel.com); spf=pass (google.com: domain of linux-kernel+bounces-185284-linux.lists.archive=gmail.com@vger.kernel.org designates 2604:1380:45e3:2400::1 as permitted sender) smtp.mailfrom="linux-kernel+bounces-185284-linux.lists.archive=gmail.com@vger.kernel.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Return-Path: Received: from sv.mirrors.kernel.org (sv.mirrors.kernel.org. [2604:1380:45e3:2400::1]) by mx.google.com with ESMTPS id 41be03b00d2f7-63412c36a1dsi3811165a12.726.2024.05.21.10.41.04 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 21 May 2024 10:41:04 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel+bounces-185284-linux.lists.archive=gmail.com@vger.kernel.org designates 2604:1380:45e3:2400::1 as permitted sender) client-ip=2604:1380:45e3:2400::1; Authentication-Results: mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=cSVRICcZ; arc=pass (i=1 spf=pass spfdomain=intel.com dkim=pass dkdomain=intel.com dmarc=pass fromdomain=intel.com); spf=pass (google.com: domain of linux-kernel+bounces-185284-linux.lists.archive=gmail.com@vger.kernel.org designates 2604:1380:45e3:2400::1 as permitted sender) smtp.mailfrom="linux-kernel+bounces-185284-linux.lists.archive=gmail.com@vger.kernel.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: from smtp.subspace.kernel.org (wormhole.subspace.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by sv.mirrors.kernel.org (Postfix) with ESMTPS id 034192814B1 for ; Tue, 21 May 2024 17:41:04 +0000 (UTC) Received: from localhost.localdomain (localhost.localdomain [127.0.0.1]) by smtp.subspace.kernel.org (Postfix) with ESMTP id D18921494D6; Tue, 21 May 2024 17:40:04 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="cSVRICcZ" Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 02C9F148FF2; Tue, 21 May 2024 17:40:01 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.18 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716313203; cv=none; b=G3jYrdtL0Y+Zw64CDbPfl2sTaYImYdKVFcOLY/yKTRSy1196Zz8QZ8XbpM3FT0vSHMy4xh6S0dNxFSJKRTMdz74hvg0C3X/vILqVMMHNyNdpz+qnP1mlJ+g1qEak8+PCv/67zpX/jtmbthTHYnvj5OgmMJxB8SumjsnNbN23l4k= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716313203; c=relaxed/simple; bh=X+44rHPb66Uil+OsN4KxGva1uIUaHr+af/WBvfmZkO0=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=h3OB5qhYm/8riIqaCTSF4a7HEkKktDquHPMOFHDcuCsztDYhMmqICM+0lf0tOmNXcrpZF4AV5XM7zH7fOUyVLHojvJ8n27NGIiMN4rNUkgk5OxXHyBDESNkC4JZz2oP3wJ02bT2SUMq+VJL+f8pIES1RrFU0kvzpQ3LKDxNDBPk= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=cSVRICcZ; arc=none smtp.client-ip=192.198.163.18 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1716313202; x=1747849202; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=X+44rHPb66Uil+OsN4KxGva1uIUaHr+af/WBvfmZkO0=; b=cSVRICcZmMfZdYS4iWXS2EZQa2cUWo4hXyfs+FRuUypZ7WMOXw2iMn1V 3SBGXzn8SYaRgBOHLYK/buafOBASQlzn3W8dtfTYywXRzvRlCztk2vkh0 r5CmIqr7n1NxeczGmRUONThWYcMVat2mxQOhNWYrpw/Iev5ykLffgmls4 bS4/nreEOcDVcIDdjdnMd/ScXuyoiGOz7YVPJqw7kXgjwpX3v2YtATLBF rTI6RukdKMyKMv+udjDmxBn1I7OBDUg581B5B866zTCHJ9MF4oecyBvfP lx7KeFehj4bgcXXHEZMXUa6qY/ALNXQrmjrxQTBzLz6LS4ZIja9UW9M20 Q==; X-CSE-ConnectionGUID: 8RijWiA0Tly4GC/Atx1BMA== X-CSE-MsgGUID: GjJ409yhQqSH7mGNfXHmkA== X-IronPort-AV: E=McAfee;i="6600,9927,11079"; a="12317676" X-IronPort-AV: E=Sophos;i="6.08,178,1712646000"; d="scan'208";a="12317676" Received: from fmviesa007.fm.intel.com ([10.60.135.147]) by fmvoesa112.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 21 May 2024 10:39:59 -0700 X-CSE-ConnectionGUID: I97usBPeRVCGDKXYf5NX6A== X-CSE-MsgGUID: 5pdY7ttZQWykDuM7ZRElZQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.08,178,1712646000"; d="scan'208";a="32924971" Received: from fl31ca102ks0602.deacluster.intel.com (HELO gnr-bkc.deacluster.intel.com) ([10.75.133.163]) by fmviesa007.fm.intel.com with ESMTP; 21 May 2024 10:39:58 -0700 From: weilin.wang@intel.com To: weilin.wang@intel.com, Namhyung Kim , Ian Rogers , Arnaldo Carvalho de Melo , Peter Zijlstra , Ingo Molnar , Alexander Shishkin , Jiri Olsa , Adrian Hunter , Kan Liang Cc: linux-perf-users@vger.kernel.org, linux-kernel@vger.kernel.org, Perry Taylor , Samantha Alt , Caleb Biggers Subject: [RFC PATCH v9 5/7] perf stat: Add command line option for enabling tpebs recording Date: Tue, 21 May 2024 13:39:33 -0400 Message-ID: <20240521173952.3397644-6-weilin.wang@intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240521173952.3397644-1-weilin.wang@intel.com> References: <20240521173952.3397644-1-weilin.wang@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit From: Weilin Wang With this command line option, tpebs recording is turned off in perf stat on default. It will only be turned on when this option is given in perf stat command. Signed-off-by: Weilin Wang --- tools/perf/builtin-stat.c | 19 +++++++++++++------ tools/perf/util/evsel.c | 19 ++++++++++++++----- 2 files changed, 27 insertions(+), 11 deletions(-) diff --git a/tools/perf/builtin-stat.c b/tools/perf/builtin-stat.c index c0e9dfa3b3c2..c27521fb1aee 100644 --- a/tools/perf/builtin-stat.c +++ b/tools/perf/builtin-stat.c @@ -117,6 +117,7 @@ static volatile sig_atomic_t child_pid = -1; static int detailed_run = 0; static bool transaction_run; static bool topdown_run = false; +static bool tpebs_recording = false; static bool smi_cost = false; static bool smi_reset = false; static int big_num_opt = -1; @@ -677,9 +678,11 @@ static int __run_perf_stat(int argc, const char **argv, int run_idx) int err; bool second_pass = false; - err = start_tpebs(&stat_config, evsel_list); - if (err < 0) - return err; + if (tpebs_recording) { + err = start_tpebs(&stat_config, evsel_list); + if (err < 0) + return err; + } if (forks) { if (evlist__prepare_workload(evsel_list, &target, argv, is_pipe, workload_exec_failed_signal) < 0) { @@ -886,9 +889,11 @@ static int __run_perf_stat(int argc, const char **argv, int run_idx) t1 = rdclock(); - err = stop_tpebs(); - if (err < 0) - return err; + if (tpebs_recording) { + err = stop_tpebs(); + if (err < 0) + return err; + } if (stat_config.walltime_run_table) stat_config.walltime_run[run_idx] = t1 - t0; @@ -1246,6 +1251,8 @@ static struct option stat_options[] = { "disable adding events for the metric threshold calculation"), OPT_BOOLEAN(0, "topdown", &topdown_run, "measure top-down statistics"), + OPT_BOOLEAN(0, "enable-tpebs-recording", &tpebs_recording, + "enable recording for tpebs when retire_latency required"), OPT_UINTEGER(0, "td-level", &stat_config.topdown_level, "Set the metrics level for the top-down statistics (0: max level)"), OPT_BOOLEAN(0, "smi-cost", &smi_cost, diff --git a/tools/perf/util/evsel.c b/tools/perf/util/evsel.c index 4d700338fc99..e1f3f63dfb54 100644 --- a/tools/perf/util/evsel.c +++ b/tools/perf/util/evsel.c @@ -1540,21 +1540,30 @@ static int evsel__set_retire_lat(struct evsel *evsel, int cpu_map_idx, int threa } } - if (!found) - return -1; + /* Set ena and run to non-zero */ + count->ena = count->run = 1; + count->lost = 0; + + if (!found) { + /* + * Set default value or 0 when retire_latency for this event is + * not found from sampling data (enable_tpebs_recording not set + * or 0 sample recorded). + */ + val = 0; + return 0; + } /* * Only set retire_latency value to the first CPU and thread. */ if (cpu_map_idx == 0 && thread == 0) + /* Lost precision when casting from double to __u64. Any improvement? */ val = t->val; else val = 0; count->val = val; - /* Set ena and run to non-zero */ - count->ena = count->run = 1; - count->lost = 0; return 0; } -- 2.43.0