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AJvYcCWv/oo8s9jRHPUkvpho/xvBAMqzLUx8lUf81rSgz1Cgoud17q26Z2pRPq2ut0XVCTqB/ZeiwUnik4n8ePG1TpEuDS+sAITmeabHRtd+ X-Gm-Message-State: AOJu0YxCNPZS97qgujZ0aHp2cZJo0Nx/gkP82b5GJsRsrr0JbZpNOHs4 C3Me54USND20ml8TXfEO7ZHm5xHDF5zPlzgqQozVIRxtHU6hA3VRZIKO6CDdiii0KCQJaAorYfR fKGhgYVM52aZwW9AmVGXiVG4PrnU2pg79YIT1ig== X-Received: by 2002:a05:6808:140e:b0:3c7:4db:9769 with SMTP id 5614622812f47-3cdb6c6eb3dmr1592357b6e.47.1716366298226; Wed, 22 May 2024 01:24:58 -0700 (PDT) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 References: <20240415064905.25184-1-yongxuan.wang@sifive.com> In-Reply-To: <20240415064905.25184-1-yongxuan.wang@sifive.com> From: Yong-Xuan Wang Date: Wed, 22 May 2024 16:24:46 +0800 Message-ID: Subject: Re: [PATCH 1/1] RISC-V: KVM: No need to use mask when hart-index-bit is 0 To: linux-riscv@lists.infradead.org, kvm-riscv@lists.infradead.org Cc: greentime.hu@sifive.com, vincent.chen@sifive.com, Anup Patel , Atish Patra , Paul Walmsley , Palmer Dabbelt , Albert Ou , kvm@vger.kernel.org, linux-kernel@vger.kernel.org Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Ping On Mon, Apr 15, 2024 at 2:49=E2=80=AFPM Yong-Xuan Wang wrote: > > When the maximum hart number within groups is 1, hart-index-bit is set to > 0. Consequently, there is no need to restore the hart ID from IMSIC > addresses and hart-index-bit settings. Currently, QEMU and kvmtool do not > pass correct hart-index-bit values when the maximum hart number is a > power of 2, thereby avoiding this issue. Corresponding patches for QEMU > and kvmtool will also be dispatched. > > Fixes: 89d01306e34d ("RISC-V: KVM: Implement device interface for AIA irq= chip") > Signed-off-by: Yong-Xuan Wang > --- > arch/riscv/kvm/aia_device.c | 7 ++++--- > 1 file changed, 4 insertions(+), 3 deletions(-) > > diff --git a/arch/riscv/kvm/aia_device.c b/arch/riscv/kvm/aia_device.c > index 0eb689351b7d..5cd407c6a8e4 100644 > --- a/arch/riscv/kvm/aia_device.c > +++ b/arch/riscv/kvm/aia_device.c > @@ -237,10 +237,11 @@ static gpa_t aia_imsic_ppn(struct kvm_aia *aia, gpa= _t addr) > > static u32 aia_imsic_hart_index(struct kvm_aia *aia, gpa_t addr) > { > - u32 hart, group =3D 0; > + u32 hart =3D 0, group =3D 0; > > - hart =3D (addr >> (aia->nr_guest_bits + IMSIC_MMIO_PAGE_SHIFT)) & > - GENMASK_ULL(aia->nr_hart_bits - 1, 0); > + if (aia->nr_hart_bits) > + hart =3D (addr >> (aia->nr_guest_bits + IMSIC_MMIO_PAGE_S= HIFT)) & > + GENMASK_ULL(aia->nr_hart_bits - 1, 0); > if (aia->nr_group_bits) > group =3D (addr >> aia->nr_group_shift) & > GENMASK_ULL(aia->nr_group_bits - 1, 0); > -- > 2.17.1 >