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[2001:1ae9:1c2:4c00:20f:c6b4:1e57:7965]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-a5a1789247csm1741002666b.82.2024.05.22.02.00.13 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 22 May 2024 02:00:13 -0700 (PDT) Date: Wed, 22 May 2024 11:00:12 +0200 From: Andrew Jones To: Yong-Xuan Wang Cc: linux-riscv@lists.infradead.org, kvm-riscv@lists.infradead.org, greentime.hu@sifive.com, vincent.chen@sifive.com, Anup Patel , Atish Patra , Paul Walmsley , Palmer Dabbelt , Albert Ou , kvm@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH 1/1] RISC-V: KVM: No need to use mask when hart-index-bit is 0 Message-ID: <20240522-74009df58fb51008bae6cbaf@orel> References: <20240415064905.25184-1-yongxuan.wang@sifive.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20240415064905.25184-1-yongxuan.wang@sifive.com> On Mon, Apr 15, 2024 at 02:49:04PM GMT, Yong-Xuan Wang wrote: > When the maximum hart number within groups is 1, hart-index-bit is set to > 0. Consequently, there is no need to restore the hart ID from IMSIC > addresses and hart-index-bit settings. Currently, QEMU and kvmtool do not > pass correct hart-index-bit values when the maximum hart number is a > power of 2, thereby avoiding this issue. Corresponding patches for QEMU > and kvmtool will also be dispatched. > > Fixes: 89d01306e34d ("RISC-V: KVM: Implement device interface for AIA irqchip") > Signed-off-by: Yong-Xuan Wang > --- > arch/riscv/kvm/aia_device.c | 7 ++++--- > 1 file changed, 4 insertions(+), 3 deletions(-) > > diff --git a/arch/riscv/kvm/aia_device.c b/arch/riscv/kvm/aia_device.c > index 0eb689351b7d..5cd407c6a8e4 100644 > --- a/arch/riscv/kvm/aia_device.c > +++ b/arch/riscv/kvm/aia_device.c > @@ -237,10 +237,11 @@ static gpa_t aia_imsic_ppn(struct kvm_aia *aia, gpa_t addr) > > static u32 aia_imsic_hart_index(struct kvm_aia *aia, gpa_t addr) > { > - u32 hart, group = 0; > + u32 hart = 0, group = 0; > > - hart = (addr >> (aia->nr_guest_bits + IMSIC_MMIO_PAGE_SHIFT)) & > - GENMASK_ULL(aia->nr_hart_bits - 1, 0); > + if (aia->nr_hart_bits) > + hart = (addr >> (aia->nr_guest_bits + IMSIC_MMIO_PAGE_SHIFT)) & > + GENMASK_ULL(aia->nr_hart_bits - 1, 0); > if (aia->nr_group_bits) > group = (addr >> aia->nr_group_shift) & > GENMASK_ULL(aia->nr_group_bits - 1, 0); > -- > 2.17.1 > Reviewed-by: Andrew Jones