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Wed, 22 May 2024 19:25:30 +0000 Received: from smtpav01.dal12v.mail.ibm.com (smtpav01.dal12v.mail.ibm.com [10.241.53.100]) by smtprelay01.wdc07v.mail.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id 44MJPREW45482266 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Wed, 22 May 2024 19:25:29 GMT Received: from smtpav01.dal12v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 32F9958065; Wed, 22 May 2024 19:25:27 +0000 (GMT) Received: from smtpav01.dal12v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id D9FCB58061; Wed, 22 May 2024 19:25:26 +0000 (GMT) Received: from slate16.aus.stglabs.ibm.com (unknown [9.61.104.209]) by smtpav01.dal12v.mail.ibm.com (Postfix) with ESMTP; Wed, 22 May 2024 19:25:26 +0000 (GMT) From: Eddie James To: linux-fsi@lists.ozlabs.org Cc: eajames@linux.ibm.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, ninad@linux.ibm.com, lakshmiy@us.ibm.com, linux-i2c@vger.kernel.org, linux-spi@vger.kernel.org, linux-aspeed@lists.ozlabs.org, andrew@codeconstruct.com.au, joel@jms.id.au, robh@kernel.org, conor+dt@kernel.org, krzk+dt@kernel.org, andi.shyti@kernel.org, broonie@kernel.org Subject: [PATCH v6 06/20] dt-bindings: fsi: Document the FSI controller common properties Date: Wed, 22 May 2024 14:25:10 -0500 Message-Id: <20240522192524.3286237-7-eajames@linux.ibm.com> X-Mailer: git-send-email 2.39.3 In-Reply-To: <20240522192524.3286237-1-eajames@linux.ibm.com> References: <20240522192524.3286237-1-eajames@linux.ibm.com> X-TM-AS-GCONF: 00 X-Proofpoint-GUID: Um5Kc67XS9mpdeGbv2sqVvcivQrdJbNH X-Proofpoint-ORIG-GUID: Um5Kc67XS9mpdeGbv2sqVvcivQrdJbNH Content-Transfer-Encoding: 8bit X-Proofpoint-UnRewURL: 0 URL was un-rewritten Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.650,FMLib:17.12.28.16 definitions=2024-05-22_10,2024-05-22_01,2024-05-17_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxlogscore=999 adultscore=0 priorityscore=1501 clxscore=1015 suspectscore=0 impostorscore=0 mlxscore=0 phishscore=0 bulkscore=0 spamscore=0 lowpriorityscore=0 malwarescore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2405010000 definitions=main-2405220134 Since there are multiple FSI controllers documented, the common properties should be documented separately and then referenced from the specific controller documentation. Add bus-frequency for the FSI bus and CFAM local bus frequencies. Add interrupt controller properties. Signed-off-by: Eddie James --- Changes since v5: - Switch from clock-frequency to bus-frequency .../bindings/fsi/fsi-controller.yaml | 66 +++++++++++++++++++ 1 file changed, 66 insertions(+) create mode 100644 Documentation/devicetree/bindings/fsi/fsi-controller.yaml diff --git a/Documentation/devicetree/bindings/fsi/fsi-controller.yaml b/Documentation/devicetree/bindings/fsi/fsi-controller.yaml new file mode 100644 index 0000000000000..ffe191921b268 --- /dev/null +++ b/Documentation/devicetree/bindings/fsi/fsi-controller.yaml @@ -0,0 +1,66 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/fsi/fsi-controller.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: FSI Controller Common Properties + +maintainers: + - Eddie James + +description: + FSI (FRU (Field Replaceable Unit) Service Interface) is a two wire bus. The + FSI bus is connected to a CFAM (Common FRU Access Macro) which contains + various engines such as I2C controllers, SPI controllers, etc. + +properties: + "#address-cells": + const: 2 + + "#size-cells": + const: 0 + + '#interrupt-cells': + const: 1 + + bus-frequency: + minimum: 1 + maximum: 200000000 + + interrupt-controller: true + + no-scan-on-init: + $ref: /schemas/types.yaml#/definitions/flag + description: + The FSI controller cannot scan the bus during initialization. + +patternProperties: + "cfam@[0-9a-f],[0-9a-f]": + type: object + properties: + chip-id: + $ref: /schemas/types.yaml#/definitions/uint32 + description: + Processor index, a global unique chip ID which is used to identify + the physical location of the chip in a system specific way. + + bus-frequency: + minimum: 1 + maximum: 100000000 + + reg: + maxItems: 1 + + "#address-cells": + const: 1 + + "#size-cells": + const: 1 + + required: + - reg + + additionalProperties: true + +additionalProperties: true -- 2.39.3