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AJvYcCU9+17qOfwtaj1B+lsd4y7sggPIDBtgflw1PNU1dJEiX7hge7Mr55iFYfilppTMcIMMzoP94lPExl70nbcSYlzQe7Ep5mHVUGYEq0eN X-Gm-Message-State: AOJu0YwEgJEu1fzY3ziNG1euzjdJB2j4OyUbnFdM4XaBJyghLEYwJGLp 7aOQVYwPLIid1LSxhnxS1qiaBZ6kxvv83ReQpOf4OUml8v7axWh5 X-Received: by 2002:a2e:3609:0:b0:2e1:ae29:f28a with SMTP id 38308e7fff4ca-2e94959c736mr34882401fa.34.1716453810739; Thu, 23 May 2024 01:43:30 -0700 (PDT) Received: from localhost.localdomain ([5.188.167.245]) by smtp.googlemail.com with ESMTPSA id 38308e7fff4ca-2e706ee0a65sm19233781fa.112.2024.05.23.01.43.29 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 23 May 2024 01:43:29 -0700 (PDT) From: Sergey Matyukevich To: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org Cc: Anup Patel , Atish Patra , Palmer Dabbelt , Paul Walmsley , Albert Ou , Samuel Holland , Alexandre Ghiti , Conor Dooley , Sergey Matyukevich Subject: [PATCH v2] riscv: prevent pt_regs corruption for secondary idle threads Date: Thu, 23 May 2024 11:43:23 +0300 Message-ID: <20240523084327.2013211-1-geomatsi@gmail.com> X-Mailer: git-send-email 2.44.0 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit From: Sergey Matyukevich Top of the kernel thread stack should be reserved for pt_regs. However this is not the case for the idle threads of the secondary boot harts. Their stacks overlap with their pt_regs, so both may get corrupted. Similar issue has been fixed for the primary hart, see c7cdd96eca28 ("riscv: prevent stack corruption by reserving task_pt_regs(p) early"). However that fix was not propagated to the secondary harts. The problem has been noticed in some CPU hotplug tests with V enabled. The function smp_callin stored several registers on stack, corrupting top of pt_regs structure including status field. As a result, kernel attempted to save or restore inexistent V context. Fixes: 9a2451f18663 ("RISC-V: Avoid using per cpu array for ordered booting") Fixes: 2875fe056156 ("RISC-V: Add cpu_ops and modify default booting method") Signed-off-by: Sergey Matyukevich Reviewed-by: Alexandre Ghiti --- Changes since v1 [1]: - fixed git revisions in commit message [1] https://lore.kernel.org/linux-riscv/20240424221927.900612-1-geomatsi@gmail.com/ --- arch/riscv/kernel/cpu_ops_sbi.c | 2 +- arch/riscv/kernel/cpu_ops_spinwait.c | 3 +-- 2 files changed, 2 insertions(+), 3 deletions(-) diff --git a/arch/riscv/kernel/cpu_ops_sbi.c b/arch/riscv/kernel/cpu_ops_sbi.c index 1cc7df740edd..e6fbaaf54956 100644 --- a/arch/riscv/kernel/cpu_ops_sbi.c +++ b/arch/riscv/kernel/cpu_ops_sbi.c @@ -72,7 +72,7 @@ static int sbi_cpu_start(unsigned int cpuid, struct task_struct *tidle) /* Make sure tidle is updated */ smp_mb(); bdata->task_ptr = tidle; - bdata->stack_ptr = task_stack_page(tidle) + THREAD_SIZE; + bdata->stack_ptr = task_pt_regs(tidle); /* Make sure boot data is updated */ smp_mb(); hsm_data = __pa(bdata); diff --git a/arch/riscv/kernel/cpu_ops_spinwait.c b/arch/riscv/kernel/cpu_ops_spinwait.c index 613872b0a21a..24869eb88908 100644 --- a/arch/riscv/kernel/cpu_ops_spinwait.c +++ b/arch/riscv/kernel/cpu_ops_spinwait.c @@ -34,8 +34,7 @@ static void cpu_update_secondary_bootdata(unsigned int cpuid, /* Make sure tidle is updated */ smp_mb(); - WRITE_ONCE(__cpu_spinwait_stack_pointer[hartid], - task_stack_page(tidle) + THREAD_SIZE); + WRITE_ONCE(__cpu_spinwait_stack_pointer[hartid], task_pt_regs(tidle)); WRITE_ONCE(__cpu_spinwait_task_pointer[hartid], tidle); } -- 2.44.0