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([2001:a61:35f9:9001:40df:88bb:5090:7ab6]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-a5a1787c686sm1944815866b.47.2024.05.23.08.30.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 23 May 2024 08:30:46 -0700 (PDT) Message-ID: <61147de8e3761c5d3c000ee5ea0d9d146da89602.camel@gmail.com> Subject: Re: [PATCH RFC v2 1/8] spi: dt-bindings: spi-peripheral-props: add spi-offloads property From: Nuno =?ISO-8859-1?Q?S=E1?= To: David Lechner , Conor Dooley Cc: Mark Brown , Jonathan Cameron , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Nuno =?ISO-8859-1?Q?S=E1?= , Michael Hennerich , Lars-Peter Clausen , David Jander , Martin Sperl , linux-spi@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-iio@vger.kernel.org Date: Thu, 23 May 2024 17:30:45 +0200 In-Reply-To: <3fad2e61-c3e4-4bb1-bbea-101d5d0f91ee@baylibre.com> References: <20240510-dlech-mainline-spi-engine-offload-2-v2-0-8707a870c435@baylibre.com> <20240510-dlech-mainline-spi-engine-offload-2-v2-1-8707a870c435@baylibre.com> <20240513-headsman-hacking-d51fcc811695@spud> <20240514-aspire-ascension-449556da3615@spud> <20240516-rudder-reburial-dcf300504c0a@spud> <20240519-abreast-haziness-096a57ef57d3@spud> <20240522-gullible-ibuprofen-cf9111c25f6f@spud> <59df2cc3-5a62-45be-a0aa-5bbff13c2ae4@baylibre.com> <35de37c08331a8384aa9ebde3a9be5fec6fc418e.camel@gmail.com> <3fad2e61-c3e4-4bb1-bbea-101d5d0f91ee@baylibre.com> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable User-Agent: Evolution 3.52.1 (3.52.1-1.fc40) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 On Thu, 2024-05-23 at 10:09 -0500, David Lechner wrote: > On 5/23/24 9:57 AM, Nuno S=C3=A1 wrote: > > On Thu, 2024-05-23 at 09:28 -0500, David Lechner wrote: > > > On 5/22/24 1:24 PM, Conor Dooley wrote: > > > > On Tue, May 21, 2024 at 09:54:39AM -0500, David Lechner wrote: > > > > > On Sun, May 19, 2024 at 7:53=E2=80=AFAM Conor Dooley wrote: > > > > > >=20 > > > > > > On Fri, May 17, 2024 at 11:51:58AM -0500, David Lechner wrote: > > > > > > > On Thu, May 16, 2024 at 4:32=E2=80=AFPM Conor Dooley wrote: > > > > > > > > On Tue, May 14, 2024 at 05:56:47PM -0500, David Lechner wro= te: > > > > > >=20 > > >=20 > >=20 > > ... > >=20 > > >=20 > > > controller: > > > #spi-offload-cells =3D <2>: /* 1st cell =3D offload instance > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2= =A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0 * 2nd cell =3D trigger provider */ > > >=20 > >=20 > > What about things like DMA? I'm mentioning it a lot because it's way mo= re complex > > having it on the controller (from a SW perspective). But from an HW poi= nt of > > view, > > it's always very similar (if not the same) as your case A. > >=20 >=20 > If we had a setup where there was more than one place that, e.g. the > RX stream from the offload could be piped, then I would add a 3rd > cell to describe that. If the hardware is fixed and the RX stream > always goes to a specific DMA channel, then it doesn't seem like we > need to describe that in the SPI controller node because the hardware > is fixed. >=20 Well, yes, still the DMA channel is connected on the controller and not the peripheral. Same deal as we discussed on the IIO backends stuff. But there,= since it's all IIO it was easy to make the DMA a property of the backend device. = That said, I can surely see having the property in the peripheral. Another thing that came to mind for the trigger case. What about an additio= nal spi interface for configuring/setting the trigger rate? Sounds generic and then= we would not really need the trigger on the peripheral right (did not checked the CR= C issue you mentioned so not sure if it's somehow trigger related)? Hmm but sometimes there's other things than rate/period (like offset) to ca= re about so maybe not doable... Bah! - Nuno S=C3=A1