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[209.85.219.176]) by smtp.gmail.com with ESMTPSA id 00721157ae682-62a0a4f34d3sm1676307b3.86.2024.05.24.00.47.57 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 24 May 2024 00:47:57 -0700 (PDT) Received: by mail-yb1-f176.google.com with SMTP id 3f1490d57ef6-df771983aedso579007276.1; Fri, 24 May 2024 00:47:57 -0700 (PDT) X-Forwarded-Encrypted: i=1; AJvYcCU35eEXuH3fp/yKqjM/2ZFHpwA6uiW6spGNo0XLcQNwxXEAUXkaRJmpR5iKjWFbkvDx/Z7G8RPWoGb1BvLhPl+f7WK0xN/upxhRp6L4F/vHtgVsDbUK7OE2uymfhW9zpReAqs8EyyfnbFiF X-Received: by 2002:a25:83c4:0:b0:de6:b58:fe72 with SMTP id 3f1490d57ef6-df772259b37mr1448543276.58.1716536877102; Fri, 24 May 2024 00:47:57 -0700 (PDT) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 References: <20240409154253.3043822-1-hugo@hugovil.com> <20240409154253.3043822-4-hugo@hugovil.com> <20240523195625.fa40049802a43a76dbc2a96d@hugovil.com> In-Reply-To: <20240523195625.fa40049802a43a76dbc2a96d@hugovil.com> From: Geert Uytterhoeven Date: Fri, 24 May 2024 09:47:44 +0200 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH v4 3/5] serial: sc16is7xx: split into core and I2C/SPI parts (core) To: Hugo Villeneuve Cc: Andy Shevchenko , gregkh@linuxfoundation.org, jirislaby@kernel.org, peterz@infradead.org, mingo@kernel.org, linux-kernel@vger.kernel.org, linux-serial@vger.kernel.org, Hugo Villeneuve Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Hi Hugo, On Fri, May 24, 2024 at 1:56=E2=80=AFAM Hugo Villeneuve = wrote: > On Thu, 23 May 2024 09:33:36 +0200 > Geert Uytterhoeven wrote: > > On Tue, Apr 23, 2024 at 3:11=E2=80=AFPM Geert Uytterhoeven wrote: > > > On Tue, Apr 23, 2024 at 12:37=E2=80=AFPM Andy Shevchenko > > > wrote: > > > > On Tue, Apr 23, 2024 at 1:01=E2=80=AFPM Geert Uytterhoeven wrote: > > > > > On Tue, Apr 9, 2024 at 5:48=E2=80=AFPM Hugo Villeneuve wrote: > > > > > > > > > -config SERIAL_SC16IS7XX > > > > > > - tristate "SC16IS7xx serial support" > > > > > > + tristate "NXP SC16IS7xx UART support" > > > > > > > > > > Hence this replaces SERIAL_SC16IS7XX_CORE by SERIAL_SC16IS7XX, > > > > > so arch/mips/configs/cu1??0-neo_defconfig needs to updated. > > > > > > > > select SERIAL_CORE > > > > - depends on (SPI_MASTER && !I2C) || I2C > > > > + select SERIAL_SC16IS7XX_SPI if SPI_MASTER > > > > + select SERIAL_SC16IS7XX_I2C if I2C > > > > > > > > > So if SPI_MASTER or I2C is enabled, the corresponding SERIAL_SC16= IS7XX_* > > > > > subdriver can no longer be disabled? According to > > > > > https://lore.kernel.org/all/20240403123501.8ef5c99f65a40ca2c10f63= 5a@hugovil.com/ > > > > > you did want to support that? > > > > > > > > I believe it has been taken from one of the IIO drivers as an examp= le. > > > > > > Looks like a bad example to follow: > > > 1. The driver question now pops up if both I2C and SPI_MASTER > > > are disabled, > > > 2. What if SERIAL_SC16IS7XX_CORE is builtin, but I2C and/or > > > SPI_MASTER are modular? > > > > > > I believe the only way to fix that is by letting the sub-drivers sele= ct the > > > core driver, like before. > > > > FTR, this issue is now upstream. > I replied to you and Andy a few weeks ago about this (multiple emails wit= h suggestions/explanations), and I even asked if you were satisfied with wh= at I proposed, but never got anything from you, so I am still waiting on fe= edback to send a patch to fix this: > > https://lore.kernel.org/all/20240430090333.5c5f029553cabcdf699310cb@hugov= il.com/ Sorry, I indeed forgot to reply there. Please use two visible symbols (for I2C and SPI), which select the invisible SERIAL_SC16IS7XX_CORE. Thanks! Gr{oetje,eeting}s, Geert --=20 Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k= org In personal conversations with technical people, I call myself a hacker. Bu= t when I'm talking to journalists I just say "programmer" or something like t= hat. -- Linus Torvalds