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[139.178.88.99]) by mx.google.com with ESMTPS id 98e67ed59e1d1-2bf5fe5def3si1159577a91.139.2024.05.24.02.49.02 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 24 May 2024 02:49:03 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel+bounces-188581-linux.lists.archive=gmail.com@vger.kernel.org designates 139.178.88.99 as permitted sender) client-ip=139.178.88.99; Authentication-Results: mx.google.com; arc=pass (i=1 spf=pass spfdomain=bp.renesas.com dmarc=pass fromdomain=bp.renesas.com); spf=pass (google.com: domain of linux-kernel+bounces-188581-linux.lists.archive=gmail.com@vger.kernel.org designates 139.178.88.99 as permitted sender) smtp.mailfrom="linux-kernel+bounces-188581-linux.lists.archive=gmail.com@vger.kernel.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=renesas.com Received: from smtp.subspace.kernel.org (wormhole.subspace.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by sv.mirrors.kernel.org (Postfix) with ESMTPS id 77AB22820B9 for ; Fri, 24 May 2024 09:48:57 +0000 (UTC) Received: from localhost.localdomain (localhost.localdomain [127.0.0.1]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 14452127B4D; Fri, 24 May 2024 09:47:23 +0000 (UTC) Received: from relmlie5.idc.renesas.com (relmlor1.renesas.com [210.160.252.171]) by smtp.subspace.kernel.org (Postfix) with ESMTP id DF6721272C9; Fri, 24 May 2024 09:47:20 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=210.160.252.171 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716544042; cv=none; b=jIgjxtgo+4cianYnsDDJcgMqCQE56NMs46/cR3tOuJkbYkdzwmMFRFHiw6AgJCyGuiwZUwU823XCjlnfqWgS7eN3/LVzs5VRCW0GmtEnivO9GC9PMXYSBUtoDYz/h1IFhcVN4i2esgsF53iXJpyBBjx5L/2ZloMla5aiqgz7RIk= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716544042; c=relaxed/simple; bh=5PFi4RWw+be8UZZli6eYggUkYSb/gKYdnyQRtesu3bM=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=Y4C0EnmRTeCTtxbkR+esR7hnNNTv2JREOJnACVmrziiDRupC45GMUCqNWAKwIc7F+As/BUz3p6dfYqJKmV2cMd9Yw4c+WD2PDddYVW6hBLn4L4/flmUAuZSupsLlqLZA23g24QolGKitnFRbbihj9tW+ah4QoykPpUS65RVaazA= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=bp.renesas.com; spf=pass smtp.mailfrom=bp.renesas.com; arc=none smtp.client-ip=210.160.252.171 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=bp.renesas.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bp.renesas.com X-IronPort-AV: E=Sophos;i="6.08,185,1712588400"; d="scan'208";a="205579849" Received: from unknown (HELO relmlir5.idc.renesas.com) ([10.200.68.151]) by relmlie5.idc.renesas.com with ESMTP; 24 May 2024 18:47:20 +0900 Received: from renesas-deb12.cephei.uk (unknown [10.226.93.196]) by relmlir5.idc.renesas.com (Postfix) with ESMTP id B4E24400720C; Fri, 24 May 2024 18:47:16 +0900 (JST) From: Paul Barker To: Geert Uytterhoeven , Magnus Damm , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Linus Walleij Cc: Paul Barker , linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 8/9] arm64: dts: renesas: rzg2lc: Set Ethernet PVDD to 1.8V Date: Fri, 24 May 2024 10:46:02 +0100 Message-Id: <20240524094603.988-9-paul.barker.ct@bp.renesas.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240524094603.988-1-paul.barker.ct@bp.renesas.com> References: <20240524094603.988-1-paul.barker.ct@bp.renesas.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit On the RZ/G2LC SMARC SOM, the RGMII interface between the SoC and the Ethernet PHY operates at 1.8V. The power supply for this interface may be correctly configured in u-boot, but the kernel should not be relying on this. Now that the RZ/G2L pinctrl driver supports configuring the Ethernet power supply voltage, we can simply specify the desired voltage in the device tree. Signed-off-by: Paul Barker --- arch/arm64/boot/dts/renesas/rzg2lc-smarc-som.dtsi | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/renesas/rzg2lc-smarc-som.dtsi b/arch/arm64/boot/dts/renesas/rzg2lc-smarc-som.dtsi index 664311fd2098..b4ef5ea8a9e3 100644 --- a/arch/arm64/boot/dts/renesas/rzg2lc-smarc-som.dtsi +++ b/arch/arm64/boot/dts/renesas/rzg2lc-smarc-som.dtsi @@ -130,6 +130,7 @@ &pinctrl { eth0_pins: eth0 { txc { pinmux = ; /* ET0_TXC */ + power-source = <1800>; output-enable; }; @@ -147,8 +148,12 @@ mux { , /* ET0_RXD0 */ , /* ET0_RXD1 */ , /* ET0_RXD2 */ - , /* ET0_RXD3 */ - ; /* IRQ0 */ + ; /* ET0_RXD3 */ + power-source = <1800>; + }; + + irq { + pinmux = ; /* IRQ0 */ }; }; -- 2.39.2