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Date: Fri, 24 May 2024 20:14:30 +0100
From: Conor Dooley <conor@kernel.org>
To: Palmer Dabbelt <palmer@rivosinc.com>
Cc: linux-riscv@lists.infradead.org, corbet@lwn.net,
	Paul Walmsley <paul.walmsley@sifive.com>,
	Palmer Dabbelt <palmer@dabbelt.com>, aou@eecs.berkeley.edu,
	costa.shul@redhat.com, Conor Dooley <conor.dooley@microchip.com>,
	linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH] Documentation: RISC-V: uabi: Only scalar misaligned
 loads are supported
Message-ID: <20240524-ruckus-trickily-1cda26c1a455@spud>
References: <20240524185600.5919-1-palmer@rivosinc.com>
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On Fri, May 24, 2024 at 11:56:00AM -0700, Palmer Dabbelt wrote:
> From: Palmer Dabbelt <palmer@rivosinc.com>
>=20
> We're stuck supporting scalar misaligned loads in userspace because they
> were part of the ISA at the time we froze the uABI.  That wasn't the
> case for vector misaligned accesses, so depending on them
> unconditionally is a userspace bug.  All extant vector hardware traps on
> these misaligned accesses.
>=20
> Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
> ---
>  Documentation/arch/riscv/uabi.rst | 4 +++-
>  1 file changed, 3 insertions(+), 1 deletion(-)
>=20
> diff --git a/Documentation/arch/riscv/uabi.rst b/Documentation/arch/riscv=
/uabi.rst
> index 54d199dce78b..2b420bab0527 100644
> --- a/Documentation/arch/riscv/uabi.rst
> +++ b/Documentation/arch/riscv/uabi.rst
> @@ -65,4 +65,6 @@ the extension, or may have deliberately removed it from=
 the listing.
>  Misaligned accesses
>  -------------------
> =20
> -Misaligned accesses are supported in userspace, but they may perform poo=
rly.
> +Misaligned scalar accesses are supported in userspace, but they may perf=
orm
> +poorly.  Misaligned vector accesses are only supported if the Zicclsm ex=
tension
> +is supported.

Reviewed-by: Conor Dooley <conor.dooley@microchip.com>

Now we just need to find someone that cares sufficiently about Zicclsm
to write the bindings, detection and hwprobe key for Zicclsm. Maybe I'll
be the lucky fool, depending on what the x280 does...

Thanks,
Conor.

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Content-Type: application/pgp-signature; name="signature.asc"

-----BEGIN PGP SIGNATURE-----

iHUEABYIAB0WIQRh246EGq/8RLhDjO14tDGHoIJi0gUCZlDnFgAKCRB4tDGHoIJi
0j7sAQDFc2gfp1NN+WtHV5hOv86OGvZlIMu340StRhWaH9OJVAD+P0fMN7A4/i2x
j7jW9XsRLDijgGsUemTQdO+5qHFSpgQ=
=FnYL
-----END PGP SIGNATURE-----

--/ZOy8tql2JsUXvLD--