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Sat, 25 May 2024 04:54:51 +0000 Date: Sat, 25 May 2024 06:54:46 +0200 From: Oscar Salvador To: Christophe Leroy Cc: Andrew Morton , Jason Gunthorpe , Peter Xu , Michael Ellerman , Nicholas Piggin , linux-kernel@vger.kernel.org, linux-mm@kvack.org, linuxppc-dev@lists.ozlabs.org Subject: Re: [RFC PATCH v2 15/20] powerpc/85xx: Switch to 64 bits PGD Message-ID: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: X-Spam-Flag: NO X-Spam-Score: -4.51 X-Rspamd-Action: no action X-Rspamd-Queue-Id: 2C22D340C0 X-Spam-Level: X-Rspamd-Server: rspamd2.dmz-prg2.suse.org X-Spamd-Result: default: False [-4.51 / 50.00]; BAYES_HAM(-3.00)[100.00%]; NEURAL_HAM_LONG(-1.00)[-1.000]; R_DKIM_ALLOW(-0.20)[suse.de:s=susede2_rsa,suse.de:s=susede2_ed25519]; NEURAL_HAM_SHORT(-0.20)[-1.000]; MIME_GOOD(-0.10)[text/plain]; MX_GOOD(-0.01)[]; FREEMAIL_ENVRCPT(0.00)[gmail.com]; TO_MATCH_ENVRCPT_ALL(0.00)[]; DKIM_SIGNED(0.00)[suse.de:s=susede2_rsa,suse.de:s=susede2_ed25519]; FUZZY_BLOCKED(0.00)[rspamd.com]; ARC_NA(0.00)[]; RBL_SPAMHAUS_BLOCKED_OPENRESOLVER(0.00)[2a07:de40:b281:104:10:150:64:97:from]; TO_DN_SOME(0.00)[]; MIME_TRACE(0.00)[0:+]; FREEMAIL_CC(0.00)[linux-foundation.org,nvidia.com,redhat.com,ellerman.id.au,gmail.com,vger.kernel.org,kvack.org,lists.ozlabs.org]; RCVD_TLS_ALL(0.00)[]; DKIM_TRACE(0.00)[suse.de:+]; RCVD_COUNT_TWO(0.00)[2]; FROM_EQ_ENVFROM(0.00)[]; FROM_HAS_DN(0.00)[]; SPAMHAUS_XBL(0.00)[2a07:de40:b281:104:10:150:64:97:from]; DWL_DNSWL_BLOCKED(0.00)[suse.de:dkim]; RECEIVED_SPAMHAUS_BLOCKED_OPENRESOLVER(0.00)[2a07:de40:b281:106:10:150:64:167:received]; RCPT_COUNT_SEVEN(0.00)[9]; MISSING_XM_UA(0.00)[]; RCVD_VIA_SMTP_AUTH(0.00)[]; DBL_BLOCKED_OPENRESOLVER(0.00)[imap1.dmz-prg2.suse.org:helo,imap1.dmz-prg2.suse.org:rdns,suse.de:dkim] On Fri, May 17, 2024 at 09:00:09PM +0200, Christophe Leroy wrote: > In order to allow leaf PMD entries, switch the PGD to 64 bits entries. > > Signed-off-by: Christophe Leroy I do not quite understand this change. Are not powerE500 and power85xx two different things? You are changing making it 64 for PPC_E500_64bits, but you are updating head_85xx. Are they sharing this code? Also, we would benefit from a slightly bigger changelog, explaining why do we need this change in some more detail. > diff --git a/arch/powerpc/include/asm/pgtable-types.h b/arch/powerpc/include/asm/pgtable-types.h > index 082c85cc09b1..db965d98e0ae 100644 > --- a/arch/powerpc/include/asm/pgtable-types.h > +++ b/arch/powerpc/include/asm/pgtable-types.h > @@ -49,7 +49,11 @@ static inline unsigned long pud_val(pud_t x) > #endif /* CONFIG_PPC64 */ > > /* PGD level */ > +#if defined(CONFIG_PPC_E500) && defined(CONFIG_PTE_64BIT) > +typedef struct { unsigned long long pgd; } pgd_t; > +#else > typedef struct { unsigned long pgd; } pgd_t; > +#endif > #define __pgd(x) ((pgd_t) { (x) }) > static inline unsigned long pgd_val(pgd_t x) > { > diff --git a/arch/powerpc/kernel/head_85xx.S b/arch/powerpc/kernel/head_85xx.S > index 39724ff5ae1f..a305244afc9f 100644 > --- a/arch/powerpc/kernel/head_85xx.S > +++ b/arch/powerpc/kernel/head_85xx.S > @@ -307,8 +307,9 @@ set_ivor: > #ifdef CONFIG_PTE_64BIT > #ifdef CONFIG_HUGETLB_PAGE > #define FIND_PTE \ > - rlwinm r12, r10, 13, 19, 29; /* Compute pgdir/pmd offset */ \ > - lwzx r11, r12, r11; /* Get pgd/pmd entry */ \ > + rlwinm r12, r10, 14, 18, 28; /* Compute pgdir/pmd offset */ \ > + add r12, r11, r12; You add the offset to pgdir? > + lwz r11, 4(r12); /* Get pgd/pmd entry */ \ What is i offset 4? -- Oscar Salvador SUSE Labs