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Mon, 27 May 2024 03:48:35 -0500 Received: from localhost (dhruva.dhcp.ti.com [172.24.227.68]) by lelvsmtp6.itg.ti.com (8.15.2/8.15.2) with ESMTP id 44R8mYwX058361; Mon, 27 May 2024 03:48:35 -0500 Date: Mon, 27 May 2024 14:18:34 +0530 From: Dhruva Gole To: Nishanth Menon CC: Markus Schneider-Pargmann , Tero Kristo , Santosh Shilimkar , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Vignesh Raghavendra , Vibhore Vardhan , Kevin Hilman , , , Subject: Re: [PATCH 6/6] arm64: dts: ti: k3-am62p: Add partial-io wakeup sources Message-ID: <20240527084834.b6uf6jimbpazsvfq@dhruva> References: <20240523080225.1288617-1-msp@baylibre.com> <20240523080225.1288617-7-msp@baylibre.com> <20240524055458.bc7hwwifcurwt7oe@catty> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Disposition: inline In-Reply-To: <20240524055458.bc7hwwifcurwt7oe@catty> X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Hi Nishanth, On May 24, 2024 at 00:54:58 -0500, Nishanth Menon wrote: > On 10:02-20240523, Markus Schneider-Pargmann wrote: > > From: Vibhore Vardhan > > > > In Partial-IO mode there are a number of possible wakeup sources. Add > > the list of phandles to these wakeup sources. Based on the patch for > > AM62a. > > > > Signed-off-by: Vibhore Vardhan > > Signed-off-by: Markus Schneider-Pargmann > > --- > > arch/arm64/boot/dts/ti/k3-am62p.dtsi | 4 ++++ > > 1 file changed, 4 insertions(+) > > > > diff --git a/arch/arm64/boot/dts/ti/k3-am62p.dtsi b/arch/arm64/boot/dts/ti/k3-am62p.dtsi > > index 94babc412575..4d43cc972056 100644 > > --- a/arch/arm64/boot/dts/ti/k3-am62p.dtsi > > +++ b/arch/arm64/boot/dts/ti/k3-am62p.dtsi > > @@ -123,3 +123,7 @@ cbass_wakeup: bus@b00000 { > > #include "k3-am62p-main.dtsi" > > #include "k3-am62p-mcu.dtsi" > > #include "k3-am62p-wakeup.dtsi" > > + > > +&dmsc { > > + ti,partial-io-wakeup-sources = <&mcu_mcan0>, <&mcu_mcan1>, <&mcu_uart0>, <&wkup_uart0>; > > +}; > > NOTE: https://software-dl.ti.com/tisci/esd/latest/2_tisci_msgs/pm/lpm.html#supported-low-power-modes > table of SoCs supported do not provide J722s or AM62p in > the list. I suspect it is an oversight, but seems to be a mismatch atm. Yes, you are right. We will fix this in the documentation soon. AM62P will be added to that list. J722s does not have lpm support. -- Best regards, Dhruva Gole