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[2604:1380:4601:e00::3]) by mx.google.com with ESMTPS id a640c23a62f3a-a626cc36e07si372676466b.408.2024.05.27.05.47.15 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 27 May 2024 05:47:16 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel+bounces-190604-linux.lists.archive=gmail.com@vger.kernel.org designates 2604:1380:4601:e00::3 as permitted sender) client-ip=2604:1380:4601:e00::3; Authentication-Results: mx.google.com; arc=pass (i=1 spf=pass spfdomain=ghiti.fr); spf=pass (google.com: domain of linux-kernel+bounces-190604-linux.lists.archive=gmail.com@vger.kernel.org designates 2604:1380:4601:e00::3 as permitted sender) smtp.mailfrom="linux-kernel+bounces-190604-linux.lists.archive=gmail.com@vger.kernel.org" Received: from smtp.subspace.kernel.org (wormhole.subspace.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by am.mirrors.kernel.org (Postfix) with ESMTPS id BDDAF1F22C1A for ; Mon, 27 May 2024 12:47:15 +0000 (UTC) Received: from localhost.localdomain (localhost.localdomain [127.0.0.1]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 4D46415E5C4; Mon, 27 May 2024 12:47:10 +0000 (UTC) Received: from relay4-d.mail.gandi.net (relay4-d.mail.gandi.net [217.70.183.196]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 682234D5A2 for ; Mon, 27 May 2024 12:47:07 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.70.183.196 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716814029; cv=none; b=m9m8j2z50fbcMWP9n+TKBrtW7MELPteAKLxmQ2Ue57UR1yeJupRjILu5MRUdKhhJx13a5sOB3/YiS7zELJo0zxPe4iIwyPhVMOqbuGw2YQ2hhPAKcJo25RrolnohCYTz3TcdQqdH8Sfj+XUOVdE6xYdkRGohUCUvZK/iQd9ctx4= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716814029; c=relaxed/simple; bh=3SKw8SIMp10qp0a2/fAzeREhqPwTT1KOLPlqw1+LW04=; h=Message-ID:Date:MIME-Version:Subject:To:References:From: In-Reply-To:Content-Type; b=pGZ8pnNryCFN4MvwXF/wGpTluQnVojUsoxuXLXrEDWs9SaRXQuBxNlpgJqQWzDadKccDdpE1BvHd23AhImhRrwCuZhASyHdfy23v94X0CPGHpK4nRBPU9CcrRi6IEnlLB/y9ZypfywU4MabERpT4CKUw+U/MpXCY4ovwEC6vU9o= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=ghiti.fr; spf=pass smtp.mailfrom=ghiti.fr; arc=none smtp.client-ip=217.70.183.196 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=ghiti.fr Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ghiti.fr Received: by mail.gandi.net (Postfix) with ESMTPSA id 356CAE000A; Mon, 27 May 2024 12:47:05 +0000 (UTC) Message-ID: <5f7e9b88-f70f-406e-9eb3-2619594ad4fd@ghiti.fr> Date: Mon, 27 May 2024 14:47:04 +0200 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 4/7] riscv: drop the use of XIP_OFFSET in XIP_FIXUP_FLASH_OFFSET Content-Language: en-US To: Nam Cao , Paul Walmsley , Palmer Dabbelt , Albert Ou , linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org References: From: Alexandre Ghiti In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-GND-Sasl: alex@ghiti.fr On 10/05/2024 08:28, Nam Cao wrote: > XIP_OFFSET is the hard-coded offset of writable data section within the > kernel. > > By hard-coding this value, the read-only section of the kernel (which is > placed before the writable data section) is restricted in size. > > As a preparation to remove this hard-coded macro XIP_OFFSET entirely, stop > using XIP_OFFSET in XIP_FIXUP_FLASH_OFFSET. Instead, use __data_loc and > _sdata to do the same thing. > > While at it, also add a description for XIP_FIXUP_FLASH_OFFSET. > > Signed-off-by: Nam Cao > --- > arch/riscv/include/asm/xip_fixup.h | 16 ++++++++++++---- > 1 file changed, 12 insertions(+), 4 deletions(-) > > diff --git a/arch/riscv/include/asm/xip_fixup.h b/arch/riscv/include/asm/xip_fixup.h > index 9ed2cfae09e0..f3d56299bc22 100644 > --- a/arch/riscv/include/asm/xip_fixup.h > +++ b/arch/riscv/include/asm/xip_fixup.h > @@ -24,13 +24,21 @@ > sub \reg, \reg, t0 > .endm > .macro XIP_FIXUP_FLASH_OFFSET reg > + /* In linker script, at the transition from read-only section to > + * writable section, the VMA is increased while LMA remains the same. > + * (See in linker script how _sdata, __data_loc and LOAD_OFFSET is > + * changed) > + * > + * Consequently, early during boot before MMU is up, the generated code > + * reads the "writable" section at wrong addresses, because VMA is used > + * by compiler to generate code, but the data is located in Flash using > + * LMA. > + */ > + la t0, _sdata > + sub \reg, \reg, t0 > la t0, __data_loc > - REG_L t1, _xip_phys_offset > - sub \reg, \reg, t1 > add \reg, \reg, t0 > .endm > - > -_xip_phys_offset: .dword CONFIG_XIP_PHYS_ADDR + XIP_OFFSET > #else > .macro XIP_FIXUP_OFFSET reg > .endm Reviewed-by: Alexandre Ghiti Thanks, Alex