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AJvYcCUDGLicjXwvG/a5x3VDYg+3tPeVDCCuPmkngMTL/zoCUsw0zpCz9lRen/Nsu7P5uuhS7eu4lH1oAJPPsCGny/PBJGkpiBAYJKGnLa6m X-Gm-Message-State: AOJu0Yxza38VwT1oOtuESFXAYRK4L5HAWjSeE9ol88KqU8Txp7nhEen4 UQ40lKLOhl/w5Id2T6RrXBPXfql938mnkjjDa9clMKqGhQkAPchsNFVoGvYL5VypzVP9i5ZEl59 exR6KiJJXNgbX55Tv+1S7mVBDvTxPiADDA52dPDXFGVXnqAcVxY8IzA== X-Received: by 2002:a25:8392:0:b0:df4:9a10:4e12 with SMTP id 3f1490d57ef6-df77223e466mr8632612276.57.1716814800453; Mon, 27 May 2024 06:00:00 -0700 (PDT) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 References: <20240521012447.42211-1-ychuang570808@gmail.com> In-Reply-To: <20240521012447.42211-1-ychuang570808@gmail.com> From: Linus Walleij Date: Mon, 27 May 2024 14:59:49 +0200 Message-ID: Subject: Re: [PATCH v9 0/3] Add support for nuvoton ma35d1 pin control To: Jacky Huang Cc: robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org, p.zabel@pengutronix.de, linux-arm-kernel@lists.infradead.org, linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, ychuang3@nuvoton.com, schung@nuvoton.com Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable On Tue, May 21, 2024 at 3:24=E2=80=AFAM Jacky Huang wrote: > From: Jacky Huang > > This patch series adds the pin control and GPIO driver for the nuvoton ma= 35d1 > ARMv8 SoC. It includes DT binding documentation and the ma35d1 pin contro= l driver. > > This pin control driver has been tested on the ma35d1 som board with Linu= x 6.9.0-rc7. > > v9: > - Update pinctrl driver: > - Fixed a compilation warning reported by testrobot. > - Removed unnecessary gpiochip_remove(). > - Made other minor fixes. Patch v9 applied for the v6.11 kernel. 9 iterations are certainly enough, if there are more comments they can be addressed in-tree. Yours, Linus Walleij