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h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=C9DfpX3sPr8XuD5qvYfKgzv7yT1uDuxthmI+jZAwXvStGpd+6Ob4hp0jgI6kzq9y+ 4raN1k3zAFntcTcuomUAXid5l18NuFDS8xQQiaRKEr/JCse6Fxel7ZjUQYeK+itxUS w2RvauWjnaO9JIM7nJmM3cjHs6u7ikKo2au/Q1X2VR02OdQZNqBROrtXLN+EP9VHWk eNXOolsXpmvXpYofsL6Xdg/Wv3ZdZlhQnJrGn9b7VahTaFxxpU0BvJQpC9dWwQ4Dcv G1ywwBF61DXnsQr0kC4v8QUasQDKODyHA8Gc+k30jT/Z7zXPxGQy8lek1g6Cu7Atsv M8wbqUXKDajcw== Received: from obitton-vm-u22.habana-labs.com (localhost [127.0.0.1]) by obitton-vm-u22.habana-labs.com (8.15.2/8.15.2/Debian-22ubuntu3) with ESMTP id 44RF2PiV1954007; Mon, 27 May 2024 18:02:26 +0300 From: Ofir Bitton To: dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org Cc: Vitaly Margolin Subject: [PATCH 4/8] accel/habanalabs: add cpld ts cpld_timestamp cpucp Date: Mon, 27 May 2024 18:02:20 +0300 Message-Id: <20240527150224.1953969-4-obitton@habana.ai> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240527150224.1953969-1-obitton@habana.ai> References: <20240527150224.1953969-1-obitton@habana.ai> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit From: Vitaly Margolin Add cpld_timestamp field to cpucp_info structure and return cpld timestamp as part of cpld version Signed-off-by: Vitaly Margolin Reviewed-by: Ofir Bitton --- drivers/accel/habanalabs/common/sysfs.c | 5 +++-- include/linux/habanalabs/cpucp_if.h | 3 ++- 2 files changed, 5 insertions(+), 3 deletions(-) diff --git a/drivers/accel/habanalabs/common/sysfs.c b/drivers/accel/habanalabs/common/sysfs.c index b6c63f8a0c1b..e9f8ccc0bbf9 100644 --- a/drivers/accel/habanalabs/common/sysfs.c +++ b/drivers/accel/habanalabs/common/sysfs.c @@ -142,8 +142,9 @@ static ssize_t cpld_ver_show(struct device *dev, struct device_attribute *attr, { struct hl_device *hdev = dev_get_drvdata(dev); - return sprintf(buf, "0x%08x\n", - le32_to_cpu(hdev->asic_prop.cpucp_info.cpld_version)); + return sprintf(buf, "0x%08x%08x\n", + le32_to_cpu(hdev->asic_prop.cpucp_info.cpld_timestamp), + le32_to_cpu(hdev->asic_prop.cpucp_info.cpld_version)); } static ssize_t cpucp_kernel_ver_show(struct device *dev, diff --git a/include/linux/habanalabs/cpucp_if.h b/include/linux/habanalabs/cpucp_if.h index 0913415243e8..1ed17887f1a8 100644 --- a/include/linux/habanalabs/cpucp_if.h +++ b/include/linux/habanalabs/cpucp_if.h @@ -1146,6 +1146,7 @@ struct cpucp_security_info { * (0 = fully functional, 1 = lower-half is not functional, * 2 = upper-half is not functional) * @sec_info: security information + * @cpld_timestamp: CPLD programmed F/W timestamp. * @pll_map: Bit map of supported PLLs for current ASIC version. * @mme_binning_mask: MME binning mask, * bits [0:6] <==> dcore0 mme fma @@ -1193,7 +1194,7 @@ struct cpucp_info { __u8 substrate_version; __u8 eq_health_check_supported; struct cpucp_security_info sec_info; - __le32 reserved2; + __le32 cpld_timestamp; __u8 pll_map[PLL_MAP_LEN]; __le64 mme_binning_mask; __u8 fw_os_version[VERSION_MAX_LEN]; -- 2.34.1