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[2001:14ba:a0c3:3a00::227]) by smtp.gmail.com with ESMTPSA id 2adb3069b0e04-5296e887a77sm811073e87.58.2024.05.27.17.48.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 27 May 2024 17:48:11 -0700 (PDT) Date: Tue, 28 May 2024 03:48:09 +0300 From: Dmitry Baryshkov To: Jun Nie Cc: Rob Clark , Abhinav Kumar , Sean Paul , Marijn Suijten , David Airlie , Daniel Vetter , Jessica Zhang , Vinod Koul , linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v5 2/6] drm/msm/dpu: adjust data width for widen bus case Message-ID: <57sr3ssi6nwermdqtnb2ackmu4tlxs4gcslvp4v6ndafnvbqhb@4npuqfpkzzan> References: <20240527-msm-drm-dsc-dsi-video-upstream-4-v5-0-f797ffba4682@linaro.org> <20240527-msm-drm-dsc-dsi-video-upstream-4-v5-2-f797ffba4682@linaro.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20240527-msm-drm-dsc-dsi-video-upstream-4-v5-2-f797ffba4682@linaro.org> On Mon, May 27, 2024 at 10:21:48PM +0800, Jun Nie wrote: > data is valid for only half the active window if widebus > is enabled > > Signed-off-by: Jun Nie > --- > drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.c | 9 +++++++++ > 1 file changed, 9 insertions(+) > > diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.c > index 225c1c7768ff..f97221423249 100644 > --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.c > +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.c > @@ -168,6 +168,15 @@ static void dpu_hw_intf_setup_timing_engine(struct dpu_hw_intf *intf, > > data_width = p->width; > > + /* > + * If widebus is enabled, data is valid for only half the active window > + * since the data rate is doubled in this mode. But for the compression > + * mode in DP case, the p->width is already adjusted in > + * drm_mode_to_intf_timing_params() Is there any reason for divergence here? > + */ > + if (p->wide_bus_en && !dp_intf) > + data_width = p->width >> 1; > + > hsync_data_start_x = hsync_start_x; > hsync_data_end_x = hsync_start_x + data_width - 1; > > > -- > 2.34.1 > -- With best wishes Dmitry