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[2001:14ba:a0c3:3a00::227]) by smtp.gmail.com with ESMTPSA id 2adb3069b0e04-5296ee4a58fsm816295e87.67.2024.05.27.17.48.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 27 May 2024 17:48:28 -0700 (PDT) Date: Tue, 28 May 2024 03:48:26 +0300 From: Dmitry Baryshkov To: Jun Nie Cc: Rob Clark , Abhinav Kumar , Sean Paul , Marijn Suijten , David Airlie , Daniel Vetter , Jessica Zhang , Vinod Koul , linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v5 3/6] drm/msm/dpu: enable compression bit in cfg2 for DSC Message-ID: References: <20240527-msm-drm-dsc-dsi-video-upstream-4-v5-0-f797ffba4682@linaro.org> <20240527-msm-drm-dsc-dsi-video-upstream-4-v5-3-f797ffba4682@linaro.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20240527-msm-drm-dsc-dsi-video-upstream-4-v5-3-f797ffba4682@linaro.org> On Mon, May 27, 2024 at 10:21:49PM +0800, Jun Nie wrote: > Enable compression bit in cfg2 register for DSC in the DSI case > > Signed-off-by: Jun Nie > --- > drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.c | 4 ++++ > 1 file changed, 4 insertions(+) > Reviewed-by: Dmitry Baryshkov -- With best wishes Dmitry