Received: by 2002:a89:d88:0:b0:1fa:5c73:8e2d with SMTP id eb8csp2477534lqb; Tue, 28 May 2024 00:30:55 -0700 (PDT) X-Forwarded-Encrypted: i=3; AJvYcCX3nImfe8Ctrj2YuZUpP18DMlDJpxq2g3Cr4qk8AHtlHfptQc2N0SX+65sZCD4LkLKOl8wFSG9YoGpl1ZVPiuXqk3koSeZ92381EkPlIQ== X-Google-Smtp-Source: AGHT+IGEASQqOaR2Wr6QDc9UjdssiFTy8da42yqmEb3RPCYAZVQDEdVG74g8VmhBqjyK3tItgqB0 X-Received: by 2002:a50:a41d:0:b0:578:e1fd:1978 with SMTP id 4fb4d7f45d1cf-578e1fd1c52mr5499799a12.39.1716881454914; Tue, 28 May 2024 00:30:54 -0700 (PDT) ARC-Seal: i=2; a=rsa-sha256; t=1716881454; cv=pass; d=google.com; s=arc-20160816; b=GYk7nFGx6jCUSIcREn6uFiEyRBVNVzyclPtkJ5zfDSH7K2zOF30SJaqyyhoW6ufV6g 9DabkeWaAtYfENqecYy9Iwejk1ScWlNbhRqR/239ROMUvJAZvkpXVXaaGp6bupRQFMKK VwC/Ci3eGdaUv6iIQlWKJAVo2dUrFM0SlKkAFwwMNin+Jw+E0E9gz2pntQR1kJ6xjR9d DijxfKz4eeNPar9PNK+Bovzfzs7qYQOgfeMN5F0LZjJelq1g8jEPthZNmsvcvpuyWuVk n2a/lzPEr85fndimuFQ2zTDkBx1fkwqRs0X6MZcpPEHWnCUGx22+LboznQRcX6NaTKm1 0pog== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=in-reply-to:content-disposition:mime-version:list-unsubscribe :list-subscribe:list-id:precedence:references:message-id:subject:cc :to:from:date:dkim-signature; bh=AvxrgjBFQy8sIPLmys/5tv4Bq1Hl8yHmJBs6RWDqJ9E=; fh=w29IkXC6mfNTazMPJEssE9X2JydxIxYfo+nG4z04jOk=; b=xoB9YCW9UWDVVlla1IlcNMykQEVqqYN0EG+SJhuiTeafemGgOAqRSE5BavcmO4xlOU cYbf95RJCVsRg4T/fUIcs2I3yNKECOSUfubv4cw8RQr6BMUH6HQCdTwNONDEGU4JMzzB Ep4BICZFxkQg+OKy9ImMFCn9VQclopFto9SHFLcNPaJ3SsEfYzybOQSso9a9I5wHxe2x 2dG934+p7w8nxrUFqEAWTEEp18eoWYgLX7ensb94gSWZzQoHGaB4a+3I4/HDPpVUKw6R dcpf3NbcU+IEAKaQFQN6eANZPZGRvB47V6DwMo36C3KIasIUy6JRwmUa234odp6qmRSB FwmQ==; dara=google.com ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@linuxfoundation.org header.s=korg header.b=M10WnakR; arc=pass (i=1 dkim=pass dkdomain=linuxfoundation.org); spf=pass (google.com: domain of linux-kernel+bounces-191872-linux.lists.archive=gmail.com@vger.kernel.org designates 147.75.80.249 as permitted sender) smtp.mailfrom="linux-kernel+bounces-191872-linux.lists.archive=gmail.com@vger.kernel.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linuxfoundation.org Return-Path: Received: from am.mirrors.kernel.org (am.mirrors.kernel.org. [147.75.80.249]) by mx.google.com with ESMTPS id 4fb4d7f45d1cf-578524d5145si4671924a12.691.2024.05.28.00.30.54 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 28 May 2024 00:30:54 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel+bounces-191872-linux.lists.archive=gmail.com@vger.kernel.org designates 147.75.80.249 as permitted sender) client-ip=147.75.80.249; Authentication-Results: mx.google.com; dkim=pass header.i=@linuxfoundation.org header.s=korg header.b=M10WnakR; arc=pass (i=1 dkim=pass dkdomain=linuxfoundation.org); spf=pass (google.com: domain of linux-kernel+bounces-191872-linux.lists.archive=gmail.com@vger.kernel.org designates 147.75.80.249 as permitted sender) smtp.mailfrom="linux-kernel+bounces-191872-linux.lists.archive=gmail.com@vger.kernel.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linuxfoundation.org Received: from smtp.subspace.kernel.org (wormhole.subspace.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by am.mirrors.kernel.org (Postfix) with ESMTPS id 9A4AA1F233A6 for ; Tue, 28 May 2024 07:30:54 +0000 (UTC) Received: from localhost.localdomain (localhost.localdomain [127.0.0.1]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 84BA074BE1; Tue, 28 May 2024 07:30:33 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linuxfoundation.org header.i=@linuxfoundation.org header.b="M10WnakR" Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A186173474; Tue, 28 May 2024 07:30:31 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716881432; cv=none; b=iTflqCtuy/5H76X63JuJ/TJR7FS51Ffkq8zr59ludZ2P+vgV5XwqPqWdOw14YFgVpvncIJZK2DnC4I1XfVOAaJ5BqV0vZ8YzsyOLW1vRdbfBsGOJqc8EAY13RGFNvywdGexBElGNjKnl6YYi1luJ6cFA2ESv9Fdv1m+H+XQZPxc= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716881432; c=relaxed/simple; bh=wky2UOR7xT77sN2zh228jjq+dgKG+IguwbF01IlPNt0=; h=Date:From:To:Cc:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=n4Yuu7APRCooz7OZczHPm/TM+NvFQaGlFbpRQ+CCUaRUrKjNO9pR8nEn3Vr+2m+m0CoY/woM7cuIgihhOvILWqgEZlTqc53SmmLZAJm4vS4CiImYEmkAMpc2iHUXCiAVkJsDrSExcj3rV90zZ3tZyPwGCPlMDqSxNmcukaVo9BE= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linuxfoundation.org header.i=@linuxfoundation.org header.b=M10WnakR; arc=none smtp.client-ip=10.30.226.201 Received: by smtp.kernel.org (Postfix) with ESMTPSA id 17811C32781; Tue, 28 May 2024 07:30:30 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=linuxfoundation.org; s=korg; t=1716881431; bh=wky2UOR7xT77sN2zh228jjq+dgKG+IguwbF01IlPNt0=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=M10WnakRct4rLxx8cafbzbhZ40GauBojJSLPUPVB0AWMDlIbImOUlyfDXXQWQfdHz FwRFWnTAg5ty/psPkSan6316VAYZkOgzZYZt9t4mI1TPNgpfuE6b2u+DabVT/1j9rJ Ce3eE58GB2dPEp8GsFSUWUczN1jQUQUadW5vGh9I= Date: Tue, 28 May 2024 09:30:34 +0200 From: Greg Kroah-Hartman To: Daehwan Jung Cc: Mathias Nyman , "open list:USB XHCI DRIVER" , open list , Thinh Nguyen Subject: Re: [PATCH] usb: host: Add a quirk for writing ERST in high-low order Message-ID: <2024052838-fifth-liver-fb4e@gregkh> References: <1716875836-186791-1-git-send-email-dh10.jung@samsung.com> <2024052814-exponent-domestic-6da2@gregkh> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <2024052814-exponent-domestic-6da2@gregkh> On Tue, May 28, 2024 at 09:23:43AM +0200, Greg Kroah-Hartman wrote: > On Tue, May 28, 2024 at 02:57:16PM +0900, Daehwan Jung wrote: > > [Synopsys]- The host controller was design to support ERST setting > > during the RUN state. But since there is a limitation in controller > > in supporting separate ERSTBA_HI and ERSTBA_LO programming, > > It is supported when the ERSTBA is programmed in 64bit, > > or in 32 bit mode ERSTBA_HI before ERSTBA_LO > > > > [Synopsys]- The internal initialization of event ring fetches > > the "Event Ring Segment Table Entry" based on the indication of > > ERSTBA_LO written. > > > > Signed-off-by: Daehwan Jung > > --- > > drivers/usb/host/xhci-mem.c | 5 ++++- > > drivers/usb/host/xhci.h | 2 ++ > > 2 files changed, 6 insertions(+), 1 deletion(-) > > > > diff --git a/drivers/usb/host/xhci-mem.c b/drivers/usb/host/xhci-mem.c > > index 3100219..ef768e6 100644 > > --- a/drivers/usb/host/xhci-mem.c > > +++ b/drivers/usb/host/xhci-mem.c > > @@ -2325,7 +2325,10 @@ xhci_add_interrupter(struct xhci_hcd *xhci, struct xhci_interrupter *ir, > > erst_base = xhci_read_64(xhci, &ir->ir_set->erst_base); > > erst_base &= ERST_BASE_RSVDP; > > erst_base |= ir->erst.erst_dma_addr & ~ERST_BASE_RSVDP; > > - xhci_write_64(xhci, erst_base, &ir->ir_set->erst_base); > > + if (xhci->quirks & XHCI_WRITE_64_HI_LO) > > + hi_lo_writeq(erst_base, &ir->ir_set->erst_base); > > + else > > + xhci_write_64(xhci, erst_base, &ir->ir_set->erst_base); > > > > /* Set the event ring dequeue address of this interrupter */ > > xhci_set_hc_event_deq(xhci, ir); > > diff --git a/drivers/usb/host/xhci.h b/drivers/usb/host/xhci.h > > index 3041515..8664dd1 100644 > > --- a/drivers/usb/host/xhci.h > > +++ b/drivers/usb/host/xhci.h > > @@ -17,6 +17,7 @@ > > #include > > #include > > #include > > +#include Why not put this in the .c file? > > /* Code sharing between pci-quirks and xhci hcd */ > > #include "xhci-ext-caps.h" > > @@ -1627,6 +1628,7 @@ struct xhci_hcd { > > #define XHCI_RESET_TO_DEFAULT BIT_ULL(44) > > #define XHCI_ZHAOXIN_TRB_FETCH BIT_ULL(45) > > #define XHCI_ZHAOXIN_HOST BIT_ULL(46) > > +#define XHCI_WRITE_64_HI_LO BIT_ULL(47) Note, you define this, and check it, but it is never set, so this patch is useless on its own and so we can not accept it as-is at all. How was this tested? thanks, greg k-h