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Tue, 28 May 2024 07:40:05 -0500 Received: from localhost (uda0492258.dhcp.ti.com [172.24.227.9]) by lelvsmtp5.itg.ti.com (8.15.2/8.15.2) with ESMTP id 44SCe4oi080379; Tue, 28 May 2024 07:40:05 -0500 Date: Tue, 28 May 2024 18:10:04 +0530 From: Siddharth Vadapalli To: Roger Quadros CC: Siddharth Vadapalli , , , , , , , , , , , , , Subject: Re: [PATCH v3 3/7] arm64: dts: ti: k3-j722s-evm: Update USB0 and USB1 Message-ID: <17d2bcb8-084d-4b44-871a-28e5750f2636@ti.com> References: <20240524090514.152727-1-s-vadapalli@ti.com> <20240524090514.152727-4-s-vadapalli@ti.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Disposition: inline In-Reply-To: X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 On Tue, May 28, 2024 at 03:18:25PM +0300, Roger Quadros wrote: [...] > > + dr_mode = "host"; > > + maximum-speed = "super-speed"; > > + phys = <&serdes0_usb_link>; > > + phy-names = "cdns3,usb3-phy"; > > +}; > > diff --git a/arch/arm64/boot/dts/ti/k3-j722s.dtsi b/arch/arm64/boot/dts/ti/k3-j722s.dtsi > > index c75744edb143..61b64fae1bf4 100644 > > --- a/arch/arm64/boot/dts/ti/k3-j722s.dtsi > > +++ b/arch/arm64/boot/dts/ti/k3-j722s.dtsi > > @@ -87,3 +87,8 @@ &oc_sram { > > reg = <0x00 0x70000000 0x00 0x40000>; > > ranges = <0x00 0x00 0x70000000 0x40000>; > > }; > > + > > +/* Include bus peripherals that are additionally > > + * present in J722S > > + */ > > + #include "k3-j722s-main.dtsi" > > diff --git a/arch/arm64/boot/dts/ti/k3-serdes.h b/arch/arm64/boot/dts/ti/k3-serdes.h > > The k3-serdes.h changes should be in a separate independent patch. Ok. Will create a new patch in v4 addressing your comments on patch 5 of this series to combine Serdes1 changes as well into the same patch. Regards, Siddharth.