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[2001:14ba:a0c3:3a00::227]) by smtp.gmail.com with ESMTPSA id 2adb3069b0e04-529b72ca748sm404584e87.285.2024.05.28.06.14.47 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 28 May 2024 06:14:47 -0700 (PDT) Date: Tue, 28 May 2024 16:14:46 +0300 From: Dmitry Baryshkov To: Ajit Pandey Cc: Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Bjorn Andersson , Konrad Dybcio , Vinod Koul , Vladimir Zapolskiy , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Taniya Das , Jagadeesh Kona , Imran Shaik , Satya Priya Kakitapalli Subject: Re: [PATCH V3 0/8] clk: qcom: Add support for DISPCC, CAMCC and GPUCC on SM4450 Message-ID: <5ppxcqdtyn7a3tyaorzlxhaxhqtse5xvjpecppjcmbxodmsz3m@5kr7uacez7u4> References: <20240528114254.3147988-1-quic_ajipan@quicinc.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20240528114254.3147988-1-quic_ajipan@quicinc.com> On Tue, May 28, 2024 at 05:12:46PM +0530, Ajit Pandey wrote: > This patch series add dt-bindings, driver and device tree support for DISPCC, CAMCC > and GPUCC on QCOM SM4450 platform and also includes a fix related to LUCID EVO PLL > config issue in clk-alpha-pll driver which is required for correct scaling of few > supported frequencies in graphics clock controllers on SM4450. > > Changes in V3: > - [PATCH 1/8]: Updated commit tags order and added Reviewed-by: tags > - [PATCH 3/8]: Fixed reusing of pll0_config and added Reviewed-by: tags > - [PATCH 6/8]: Updated commit text and added Reviewed-by tags > - [PATCH 8/8]: Updated node order for gpucc. > - Link to v2: https://lore.kernel.org/all/20240416182005.75422-1-quic_ajipan@quicinc.com/ Nit: in future please retain previous changelogs too. > > Ajit Pandey (8): > clk: qcom: clk-alpha-pll: Fix CAL_L_VAL override for LUCID EVO PLL > dt-bindings: clock: qcom: add DISPCC clocks on SM4450 > clk: qcom: Add DISPCC driver support for SM4450 > dt-bindings: clock: qcom: add CAMCC clocks on SM4450 > clk: qcom: Add CAMCC driver support for SM4450 > dt-bindings: clock: qcom: add GPUCC clocks on SM4450 > clk: qcom: Add GPUCC driver support for SM4450 > arm64: dts: qcom: sm4450: add camera, display and gpu clock controller > > .../bindings/clock/qcom,sm4450-camcc.yaml | 63 + > .../bindings/clock/qcom,sm4450-dispcc.yaml | 71 + > .../bindings/clock/qcom,sm8450-gpucc.yaml | 2 + > arch/arm64/boot/dts/qcom/sm4450.dtsi | 38 + > drivers/clk/qcom/Kconfig | 27 + > drivers/clk/qcom/Makefile | 3 + > drivers/clk/qcom/camcc-sm4450.c | 1688 +++++++++++++++++ > drivers/clk/qcom/clk-alpha-pll.c | 2 +- > drivers/clk/qcom/dispcc-sm4450.c | 770 ++++++++ > drivers/clk/qcom/gpucc-sm4450.c | 805 ++++++++ > include/dt-bindings/clock/qcom,sm4450-camcc.h | 106 ++ > .../dt-bindings/clock/qcom,sm4450-dispcc.h | 51 + > include/dt-bindings/clock/qcom,sm4450-gpucc.h | 62 + > 13 files changed, 3687 insertions(+), 1 deletion(-) > create mode 100644 Documentation/devicetree/bindings/clock/qcom,sm4450-camcc.yaml > create mode 100644 Documentation/devicetree/bindings/clock/qcom,sm4450-dispcc.yaml > create mode 100644 drivers/clk/qcom/camcc-sm4450.c > create mode 100644 drivers/clk/qcom/dispcc-sm4450.c > create mode 100644 drivers/clk/qcom/gpucc-sm4450.c > create mode 100644 include/dt-bindings/clock/qcom,sm4450-camcc.h > create mode 100644 include/dt-bindings/clock/qcom,sm4450-dispcc.h > create mode 100644 include/dt-bindings/clock/qcom,sm4450-gpucc.h > > -- > 2.25.1 > -- With best wishes Dmitry