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Message-ID: <d10e14ce-b65f-4dbd-8686-bf8c1796ba06@quicinc.com>
Date: Tue, 28 May 2024 10:36:20 -0700
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Subject: Re: [PATCH RESEND 1/3] drm/panel: sitronix-st7789v: fix timing for
 jt240mhqs_hwt_ek_e3 panel
Content-Language: en-US
To: Gerald Loacker <gerald.loacker@wolfvision.net>,
        Neil Armstrong
	<neil.armstrong@linaro.org>,
        Sam Ravnborg <sam@ravnborg.org>,
        Maarten
 Lankhorst <maarten.lankhorst@linux.intel.com>,
        Maxime Ripard
	<mripard@kernel.org>,
        Thomas Zimmermann <tzimmermann@suse.de>,
        David Airlie
	<airlied@gmail.com>, Daniel Vetter <daniel@ffwll.ch>
CC: <dri-devel@lists.freedesktop.org>, <linux-kernel@vger.kernel.org>
References: <20240409-bugfix-jt240mhqs_hwt_ek_e3-timing-v1-0-f8351d4a8d4b@wolfvision.net>
 <20240409-bugfix-jt240mhqs_hwt_ek_e3-timing-v1-1-f8351d4a8d4b@wolfvision.net>
From: Jessica Zhang <quic_jesszhan@quicinc.com>
In-Reply-To: <20240409-bugfix-jt240mhqs_hwt_ek_e3-timing-v1-1-f8351d4a8d4b@wolfvision.net>
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On 5/28/2024 1:32 AM, Gerald Loacker wrote:
> Flickering was observed when using partial mode. Moving the vsync to the
> same position as used by the default sitronix-st7789v timing resolves this
> issue.
> 
> Signed-off-by: Gerald Loacker <gerald.loacker@wolfvision.net>

Hi Gerald,

Just wondering, are these new timing values taken from the panel specs? 
If the timing in the original patch was wrong, maybe we need a fixes tag.

Acked-by: Jessica Zhang <quic_jesszhan@quicinc.com>

Thanks,

Jessica Zhang

> ---
>   drivers/gpu/drm/panel/panel-sitronix-st7789v.c | 6 +++---
>   1 file changed, 3 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/gpu/drm/panel/panel-sitronix-st7789v.c b/drivers/gpu/drm/panel/panel-sitronix-st7789v.c
> index 88e80fe98112..32e5c0348038 100644
> --- a/drivers/gpu/drm/panel/panel-sitronix-st7789v.c
> +++ b/drivers/gpu/drm/panel/panel-sitronix-st7789v.c
> @@ -286,9 +286,9 @@ static const struct drm_display_mode jt240mhqs_hwt_ek_e3_mode = {
>   	.hsync_end = 240 + 28 + 10,
>   	.htotal = 240 + 28 + 10 + 10,
>   	.vdisplay = 280,
> -	.vsync_start = 280 + 8,
> -	.vsync_end = 280 + 8 + 4,
> -	.vtotal = 280 + 8 + 4 + 4,
> +	.vsync_start = 280 + 48,
> +	.vsync_end = 280 + 48 + 4,
> +	.vtotal = 280 + 48 + 4 + 4,
>   	.width_mm = 43,
>   	.height_mm = 37,
>   	.flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC,
> 
> -- 
> 2.37.2
>